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* perf/x86/intel: Fix a warning on x86_pmu_stop() with large PEBSNamhyung Kim2020-12-031-1/+1
* perf/x86: fix sysfs type mismatchesSami Tolvanen2020-11-173-11/+11
* perf/x86/intel/uncore: Fix Add BW copypastaArnd Bergmann2020-11-101-1/+1
* perf/x86/intel: Make anythread filter support conditionalStephane Eranian2020-11-091-0/+10
* perf/x86: Make dummy_iregs staticPeter Zijlstra2020-11-091-1/+1
* perf/x86: Reduce stack usage for x86_pmu::drain_pebs()Peter Zijlstra2020-11-092-23/+26
* perf: Reduce stack usage of perf_output_begin()Peter Zijlstra2020-11-091-2/+2
* Merge tag 'perf-core-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2020-10-126-103/+687
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| * perf/x86/intel: Check perf metrics feature for each CPUKan Liang2020-10-031-0/+11
| * perf/x86/intel: Fix Ice Lake event constraint tableKan Liang2020-09-291-1/+1
| * perf/x86/intel/uncore: Fix the scale of the IMC free-running eventsKan Liang2020-09-291-6/+6
| * perf/x86/intel/uncore: Fix for iio mapping on Skylake ServerAlexander Antonov2020-09-291-2/+5
| * perf/x86/intel: Add Jasper Lake supportKan Liang2020-09-291-0/+1
| * perf/x86/intel/uncore: Reduce the number of CBOX countersKan Liang2020-09-291-1/+1
| * perf/x86/intel/uncore: Update Ice Lake uncore unitsKan Liang2020-09-291-4/+25
| * perf/x86/intel/uncore: Split the Ice Lake and Tiger Lake MSR uncore supportKan Liang2020-09-293-2/+19
| * perf/x86/intel/uncore: Support PCIe3 unit on Snow RidgeKan Liang2020-09-241-0/+53
| * perf/x86/intel/uncore: Generic support for the PCI sub driverKan Liang2020-09-242-0/+82
| * perf/x86/intel/uncore: Factor out uncore_pci_pmu_unregister()Kan Liang2020-09-241-10/+25
| * perf/x86/intel/uncore: Factor out uncore_pci_pmu_register()Kan Liang2020-09-241-31/+51
| * perf/x86/intel/uncore: Factor out uncore_pci_find_dev_pmu()Kan Liang2020-09-241-15/+33
| * perf/x86/intel/uncore: Factor out uncore_pci_get_dev_die_info()Kan Liang2020-09-241-8/+23
| * perf/x86/intel/ds: Fix x86_pmu_stop warning for large PEBSKan Liang2020-09-101-12/+20
| * perf/x86/intel: Support per-thread RDPMC TopDown metricsKan Liang2020-08-181-11/+79
| * perf/x86/intel: Support TopDown metrics on Ice LakeKan Liang2020-08-181-0/+118
| * perf/x86/intel: Generic support for hardware TopDown metricsKan Liang2020-08-181-5/+119
| * perf/x86/intel: Use switch in intel_pmu_disable/enable_eventKan Liang2020-08-181-8/+28
| * perf/x86/intel: Name the global status bit in NMI handlerKan Liang2020-08-181-2/+2
* | treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-232-4/+4
* | perf/x86/intel/uncore: Add BW counters for GT, IA and IO breakdownVaibhav Shankar2020-08-151-3/+49
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* perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang2020-07-081-1/+39
* perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang2020-07-081-5/+74
* perf/x86: Remove task_ctx_sizeKan Liang2020-07-081-1/+0
* perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang2020-07-081-2/+19
* perf/x86/intel/lbr: Support Architectural LBRKan Liang2020-07-082-11/+243
* perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang2020-07-081-26/+56
* perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang2020-07-081-16/+50
* perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang2020-07-081-4/+4
* perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang2020-07-082-13/+13
* perf/x86/intel/lbr: Support LBR_CTLKan Liang2020-07-081-0/+43
* perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang2020-07-081-33/+26
* perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang2020-07-081-17/+21
* perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang2020-07-082-30/+53
* perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang2020-07-082-7/+8
* perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang2020-07-082-17/+10
* Merge branch 'perf/vlbr'Peter Zijlstra2020-07-022-44/+116
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| * perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu2020-07-022-7/+30
| * perf/x86: Add constraint to create guest LBR event without hw counterLike Xu2020-07-022-0/+22
| * perf/x86/lbr: Add interface to get LBR informationLike Xu2020-07-021-0/+20
| * perf/x86/core: Refactor hw->idx checks and cleanupLike Xu2020-07-021-39/+46
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