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path: root/arch/x86/events/perf_event.h
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* Merge remote-tracking branch 'origin/master' into perf/corePeter Zijlstra2020-11-261-1/+2
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| * perf/x86/intel: Make anythread filter support conditionalStephane Eranian2020-11-091-0/+1
| * perf/x86: Reduce stack usage for x86_pmu::drain_pebs()Peter Zijlstra2020-11-091-1/+1
* | perf/core: Add support for PERF_SAMPLE_CODE_PAGE_SIZEStephane Eranian2020-10-291-1/+1
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* perf/x86: Fix n_metric for cancelled txnPeter Zijlstra2020-10-061-0/+1
* perf/x86: Fix n_pair for cancelled txnPeter Zijlstra2020-10-061-0/+1
* perf/x86/intel: Support TopDown metrics on Ice LakeKan Liang2020-08-181-0/+13
* perf/x86/intel: Generic support for hardware TopDown metricsKan Liang2020-08-181-0/+37
* perf/x86/intel: Fix the name of perf METRICSKan Liang2020-08-181-1/+1
* perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang2020-07-081-0/+7
* perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang2020-07-081-0/+21
* perf/x86/intel/lbr: Support Architectural LBRKan Liang2020-07-081-0/+10
* perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang2020-07-081-1/+1
* perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang2020-07-081-4/+2
* perf/x86/intel/lbr: Support LBR_CTLKan Liang2020-07-081-3/+12
* perf/x86: Expose CPUID enumeration bits for arch LBRKan Liang2020-07-081-0/+13
* perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang2020-07-081-1/+6
* perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang2020-07-081-3/+7
* perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang2020-07-081-0/+6
* perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang2020-07-081-0/+5
* perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang2020-07-081-0/+17
* perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu2020-07-021-0/+3
* perf/x86: Add constraint to create guest LBR event without hw counterLike Xu2020-07-021-0/+1
* perf/x86: Fix variable types for LBR registersWei Wang2020-07-021-2/+2
* x86/perf: Add hardware performance events support for Zhaoxin CPU.CodyYao-oc2020-04-301-0/+10
* perf/x86/amd: Add support for Large Increment per Cycle EventsKim Phillips2020-01-171-0/+18
* perf/x86/amd: Constrain Large Increment per Cycle eventsKim Phillips2020-01-171-0/+2
* perf/x86/intel: Implement LBR callstack context synchronizationAlexey Budankov2019-10-281-0/+3
* perf/core, perf/x86: Introduce swap_task_ctx() method at 'struct pmu'Alexey Budankov2019-10-281-0/+8
* perf/x86/intel: Support PEBS output to PTAlexander Shishkin2019-08-281-0/+17
* Merge tag 'v5.2' into perf/core, to pick up fixesIngo Molnar2019-07-081-20/+1
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| * perf/x86: Remove pmu->pebs_no_xmm_regsKan Liang2019-06-241-2/+1
| * perf/x86: Clean up PEBS_XMM_REGSKan Liang2019-06-241-18/+0
* | perf/x86: Use update attribute groups for default attributesJiri Olsa2019-06-031-3/+0
* | perf/x86: Use update attribute groups for capsJiri Olsa2019-06-031-1/+0
* | perf/x86: Use the new pmu::update_attrs attribute groupJiri Olsa2019-06-031-1/+1
* | perf/x86: Get rid of x86_pmu::event_attrsJiri Olsa2019-06-031-1/+0
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* perf/x86/intel: Fix INTEL_FLAGS_EVENT_CONSTRAINT* maskingStephane Eranian2019-05-101-2/+2
* perf/x86/intel: Add Icelake supportKan Liang2019-04-161-0/+2
* perf/x86: Support constraint rangesPeter Zijlstra2019-04-161-6/+37
* perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles themAndi Kleen2019-04-161-0/+1
* perf/x86/intel: Support adaptive PEBS v4Kan Liang2019-04-161-1/+10
* perf/x86: Support outputting XMM registersKan Liang2019-04-161-1/+20
* perf/x86/intel: Force resched when TFA sysctl is modifiedStephane Eranian2019-04-161-0/+1
* Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar2019-04-161-19/+19
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| * perf/x86: Fix incorrect PEBS_REGSKan Liang2019-04-161-19/+19
* | perf/x86: Remove PERF_X86_EVENT_COMMITTEDPeter Zijlstra2019-04-031-10/+9
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* perf/x86: Fixup typo in stub functionsPeter Zijlstra2019-03-151-2/+2
* Merge branch 'x86-tsx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2019-03-121-3/+14
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| * perf/x86/intel: Implement support for TSX Force AbortPeter Zijlstra (Intel)2019-03-061-0/+6
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