summaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/cpu/perf_event.h
Commit message (Expand)AuthorAgeFilesLines
* perf/x86: Move perf_event.h to its new homeBorislav Petkov2016-02-171-955/+0
* perf/x86/intel: Add perf core PMU support for Intel Knights LandingHarish Chegondi2016-01-061-0/+2
* perf/x86: Use INST_RETIRED.PREC_DIST for cycles: pppAndi Kleen2016-01-061-1/+2
* perf/x86: Remove old MSR perf tracing codeAndi Kleen2015-12-061-11/+1
* Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar2015-12-061-1/+1
|\
| * perf/x86/intel: Fix INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA macroJiri Olsa2015-12-061-1/+1
* | perf/x86: Handle multiple umask bits for BDW CYCLE_ACTIVITY.*Andi Kleen2015-11-231-0/+4
|/
* treewide: Remove old email addressPeter Zijlstra2015-11-231-1/+1
* perf/x86: Fix LBR call stack save/restoreAndi Kleen2015-11-231-0/+1
* Merge branch 'perf/urgent' into perf/core, to pick up fixes before applying n...Ingo Molnar2015-09-181-0/+1
|\
| * perf/x86/intel/pebs: Add PEBS frontend profiling for SkylakeAndi Kleen2015-09-181-0/+1
* | perf/core: Drop PERF_EVENT_TXNSukadev Bhattiprolu2015-09-131-1/+0
* | perf/core: Add a 'flags' parameter to the PMU transactional interfacesSukadev Bhattiprolu2015-09-131-0/+1
|/
* perf/x86: Make merge_attr() global to use from perf_event_intelAndi Kleen2015-08-041-0/+3
* perf/x86/intel: Add Intel Skylake PMU supportAndi Kleen2015-08-041-1/+5
* perf/x86/intel/lbr: Add support for LBRv5Andi Kleen2015-08-041-0/+1
* perf/x86/intel/lbr: Allow time stamp for free running PEBSv3Andi Kleen2015-08-041-0/+1
* perf/x86/intel/lbr: Kill off intel_pmu_needs_lbr_smpl for goodAlexander Shishkin2015-08-041-14/+0
* Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2015-06-221-0/+4
|\
| * perf/x86/intel/bts: Fix DS area sharing with x86_pmu eventsAlexander Shishkin2015-06-191-0/+4
* | perf/x86/intel: Drain the PEBS buffer during context switchesYan, Zheng2015-06-071-1/+5
* | perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interru...Yan, Zheng2015-06-071-0/+11
* | perf/x86/intel: Use the PEBS auto reload mechanism when possibleYan, Zheng2015-06-071-0/+1
* | perf/x86/intel: Remove intel_excl_states::init_statePeter Zijlstra2015-05-271-1/+0
* | perf/x86/intel: Clean up intel_commit_scheduling() placementPeter Zijlstra2015-05-271-2/+2
|/
* perf/x86: Improve HT workaround GP counter constraintPeter Zijlstra2015-05-271-3/+12
* perf/x86: Fix event/group validationPeter Zijlstra2015-05-271-4/+5
* perf/x86: Fix hw_perf_event::flags collisionPeter Zijlstra2015-04-171-9/+9
* perf/x86/intel: Streamline LBR MSR handling in PMIAndi Kleen2015-04-021-1/+1
* perf/x86/intel: Make the HT bug workaround conditional on HT enabledStephane Eranian2015-04-021-0/+5
* perf/x86/intel: Limit to half counters when the HT workaround is enabled, to ...Stephane Eranian2015-04-021-0/+2
* perf/x86/intel: Enforce HT bug workaround with PEBS for SNB/IVB/HSWMaria Dimakopoulou2015-04-021-1/+19
* perf/x86/intel: Implement cross-HT corruption bug workaroundMaria Dimakopoulou2015-04-021-0/+6
* perf/x86/intel: Add cross-HT counter exclusion infrastructureMaria Dimakopoulou2015-04-021-0/+32
* perf/x86: Add 'index' param to get_event_constraint() callbackStephane Eranian2015-04-021-1/+3
* perf/x86: Add 3 new scheduling callbacksMaria Dimakopoulou2015-04-021-0/+9
* perf/x86: Vectorize cpuc->kfree_on_onlineStephane Eranian2015-04-021-1/+7
* perf/x86: Rename x86_pmu::er_flags to 'flags'Stephane Eranian2015-04-021-3/+6
* perf/x86/intel/bts: Add BTS PMU driverAlexander Shishkin2015-04-021-0/+7
* perf/x86/intel/pt: Add Intel PT PMU driverAlexander Shishkin2015-04-021-0/+2
* perf/x86: Mark Intel PT and LBR/BTS as mutually exclusiveAlexander Shishkin2015-04-021-0/+40
* perf/x86/intel: Add INST_RETIRED.ALL workaroundsAndi Kleen2015-03-271-0/+1
* perf/x86/intel: Expose LBR callstack to user space toolingPeter Zijlstra2015-02-181-8/+0
* perf/x86/intel: Allocate space for storing LBR stackYan, Zheng2015-02-181-0/+7
* perf/x86/intel: Add basic Haswell LBR call stack supportYan, Zheng2015-02-181-1/+13
* perf/x86/intel: Use context switch callback to flush LBR stackYan, Zheng2015-02-181-1/+2
* perf: Introduce pmu context switch callbackYan, Zheng2015-02-181-0/+2
* perf/x86/intel: Reduce lbr_sel_map[] sizeYan, Zheng2015-02-181-0/+4
* perf/x86: Only allow rdpmc if a perf_event is mappedAndy Lutomirski2015-02-041-0/+2
* perf/x86: Add INTEL_FLAGS_UEVENT_CONSTRAINTAndi Kleen2014-11-161-0/+4