Commit message (Expand) | Author | Age | Files | Lines | |
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* | clk: at91: fix possible deadlock | Alexandre Belloni | 2019-12-16 | 1 | -1/+1 |
* | clk: at91: allow 24 Mhz clock as input for PLL | Eugen Hristev | 2019-09-17 | 1 | -1/+1 |
*-. | Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and... | Stephen Boyd | 2019-05-07 | 1 | -1/+11 |
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| | * | clk: at91: Mark struct clk_range as const | Stephen Boyd | 2019-04-25 | 1 | -1/+1 |
| | * | clk: at91: allow configuring generated PCR layout | Alexandre Belloni | 2019-04-25 | 1 | -0/+1 |
| | * | clk: at91: allow configuring peripheral PCR layout | Alexandre Belloni | 2019-04-25 | 1 | -0/+9 |
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* / | clk: at91: fix programmable clock for sama5d2 | Matthias Wieloch | 2019-03-18 | 1 | -1/+9 |
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* | Merge branch 'clk-at91' into clk-next | Stephen Boyd | 2019-03-08 | 1 | -1/+2 |
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| * | clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2 | Michał Mirosław | 2019-01-09 | 1 | -1/+2 |
* | | clk: at91: fix masterck name | Alexandre Belloni | 2019-02-20 | 1 | -2/+2 |
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* | clk: at91: add sama5d2 PMC driver | Alexandre Belloni | 2018-10-17 | 1 | -0/+336 |