| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: vt8500: Fix "fix device clock divisor calculations" | Arnd Bergmann | 2013-03-14 | 1 | -1/+1 |
| * | clk: vt8500: Use common of_clk_init() function | Prashant Gaikwad | 2013-01-24 | 1 | -12/+5 |
| * | clk: vt8500: Add support for WM8750/WM8850 PLL clocks | Tony Prisk | 2013-01-15 | 1 | -2/+100 |
| * | clk: vt8500: Fix division-by-0 when requested rate=0 | Tony Prisk | 2013-01-15 | 1 | -2/+12 |
| * | clk: vt8500: Fix device clock divisor calculations | Tony Prisk | 2013-01-15 | 1 | -0/+8 |
| * | clk: vt8500: Fix error in PLL calculations on non-exact match. | Tony Prisk | 2013-01-15 | 1 | -3/+3 |
| * | CLK: vt8500: Fix SDMMC clk special cases | Tony Prisk | 2012-11-09 | 1 | -0/+18 |
| * | arm: vt8500: clk: Add Common Clock Framework support | Tony Prisk | 2012-09-21 | 1 | -0/+510 |
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