| Commit message (Expand) | Author | Age | Files | Lines |
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| * | clk: keystone: syscon-clk: Use dev_err_probe() helper | Yang Yingliang | 2022-10-17 | 1 | -6/+3 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE | Thomas Gleixner | 2022-06-10 | 1 | -9/+1 |
| * | clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk | Georgi Vlaev | 2022-04-22 | 1 | -0/+11 |
| * | clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk | Lokesh Vutla | 2021-06-22 | 1 | -0/+17 |
| * | treewide: Change list_sort to use const pointers | Sami Tolvanen | 2021-04-08 | 1 | -2/+2 |
| * | clk: keystone: sci-clk: add 10% slack to set_rate | Tero Kristo | 2020-09-22 | 1 | -1/+2 |
| * | clk: keystone: sci-clk: cache results of last query rate operation | Tero Kristo | 2020-09-22 | 1 | -0/+14 |
| * | clk: keystone: sci-clk: fix parsing assigned-clock data during probe | Tero Kristo | 2020-09-22 | 1 | -1/+1 |
| * | Replace HTTP links with HTTPS ones: Common CLK framework | Alexander A. Klimov | 2020-07-10 | 2 | -2/+2 |
| * | treewide: replace '---help---' in Kconfig files with 'help' | Masahiro Yamada | 2020-06-14 | 1 | -2/+2 |
| * | clk: keystone: Add new driver to handle syscon based clocks | Vignesh Raghavendra | 2020-03-20 | 3 | -0/+181 |
| * | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2019-07-17 | 2 | -38/+212 |
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| | * | clk: keystone: sci-clk: extend clock IDs to 32 bits | Tero Kristo | 2019-06-07 | 1 | -8/+28 |
| | * | clk: keystone: sci-clk: probe clocks from DT instead of firmware | Tero Kristo | 2019-06-07 | 2 | -0/+141 |
| | * | clk: keystone: sci-clk: split out the fw clock parsing to own function | Tero Kristo | 2019-06-07 | 1 | -27/+41 |
| | * | clk: keystone: sci-clk: cut down the clock name length | Tero Kristo | 2019-06-07 | 1 | -4/+3 |
| * | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | Thomas Gleixner | 2019-05-30 | 2 | -10/+2 |
| * | | treewide: Add SPDX license identifier - Makefile/Kconfig | Thomas Gleixner | 2019-05-21 | 2 | -0/+2 |
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| * | Merge branch 'clk-k3-tisci' into clk-next | Stephen Boyd | 2018-10-18 | 3 | -1/+11 |
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| | * | clk: keystone: add missing MODULE_LICENSE | Arnd Bergmann | 2018-10-07 | 2 | -0/+10 |
| | * | clk: keystone: Enable TISCI clocks if K3_ARCH | Nishanth Menon | 2018-10-02 | 1 | -1/+1 |
| * | | clk: Convert to using %pOFn instead of device_node.name | Rob Herring | 2018-08-30 | 2 | -2/+2 |
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| * | clk: keystone: sci-clk: add support for dynamically probing clocks | Tero Kristo | 2018-03-08 | 1 | -290/+90 |
| * | clk: keystone: sci-clk: Fix sci_clk_get | Tero Kristo | 2017-08-02 | 1 | -24/+42 |
| * | clk: keystone: TI_SCI_PROTOCOL is needed for clk driver | Arnd Bergmann | 2017-06-22 | 1 | -1/+2 |
| * | clk: keystone: Add sci-clk driver support | Tero Kristo | 2017-06-14 | 3 | -1/+741 |
| * | clk: keystone: pll: Unmap region obtained by of_iomap | Arvind Yadav | 2016-12-08 | 1 | -2/+7 |
| * | clk: keystone: improve function-level documentation | Julia Lawall | 2016-11-01 | 1 | -2/+2 |
| * | clk: keystone: fix a trivial typo | Geliang Tang | 2015-10-19 | 1 | -1/+1 |
| * | Merge branch 'cleanup-clk-h-includes' into clk-next | Stephen Boyd | 2015-07-28 | 2 | -2/+0 |
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| | * | clk: keystone: Remove clk.h include | Stephen Boyd | 2015-07-20 | 2 | -2/+0 |
| * | | clk: keystone: make use of of_clk_parent_fill helper function | Dinh Nguyen | 2015-07-28 | 1 | -2/+1 |
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| * | clk: keystone: add support for post divider register for main pll | Murali Karicheri | 2015-06-18 | 1 | -2/+18 |
| * | clk: keystone: gate: fix clk_init_data initialization | Ivan Khoronzhuk | 2014-02-10 | 1 | -0/+1 |
| * | clk: keystone: gate: fix error handling on init | Grygorii Strashko | 2013-12-10 | 1 | -4/+8 |
| * | clk: keystone: use clkod register bits for postdiv | Murali Karicheri | 2013-12-10 | 1 | -4/+20 |
| * | clk: keystone: Build Keystone clock drivers | Santosh Shilimkar | 2013-10-07 | 1 | -0/+1 |
| * | clk: keystone: Add gate control clock driver | Santosh Shilimkar | 2013-10-07 | 1 | -0/+264 |
| * | clk: keystone: add Keystone PLL clock driver | Santosh Shilimkar | 2013-10-07 | 1 | -0/+305 |
