summaryrefslogtreecommitdiffstats
path: root/drivers/clk/mediatek/clk-mt2701-hif.c
Commit message (Expand)AuthorAgeFilesLines
* clk: mediatek: Make mtk_clk_simple_remove() return voidUwe Kleine-König2023-05-101-1/+1
* clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Switch to module_platform_driver() where possibleAngeloGioacchino Del Regno2023-03-131-2/+1
* clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno2023-03-131-8/+2
* clk: mediatek: Switch to mtk_clk_simple_probe() where possibleAngeloGioacchino Del Regno2023-01-301-27/+11
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-301-2/+2
* clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen2022-06-151-1/+1
* clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen2022-06-151-2/+4
* clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen2022-06-151-1/+7
* clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen2022-06-151-1/+1
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-191-2/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
* reset: mediatek: Add MT2701 reset driverShunli Wang2016-11-081-2/+6
* clk: mediatek: Add MT2701 clock supportShunli Wang2016-11-081-0/+77
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-24 18:39:33 +0000