| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: mediatek: reset: Add new register reset function with device | Rex-BC Chen | 2022-06-15 | 1 | -1/+1 |
| * | clk: mediatek: reset: Support nonsequence base offsets of reset registers | Rex-BC Chen | 2022-06-15 | 1 | -2/+4 |
| * | clk: mediatek: reset: Revise structure to control reset register | Rex-BC Chen | 2022-06-15 | 1 | -1/+7 |
| * | clk: mediatek: reset: Merge and revise reset register function | Rex-BC Chen | 2022-06-15 | 1 | -1/+1 |
| * | clk: mediatek: Replace 'struct clk' with 'struct clk_hw' | Chen-Yu Tsai | 2022-05-19 | 1 | -2/+2 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 2019-05-30 | 1 | -9/+1 |
| * | reset: mediatek: Add MT2701 reset driver | Shunli Wang | 2016-11-08 | 1 | -2/+6 |
| * | clk: mediatek: Add MT2701 clock support | Shunli Wang | 2016-11-08 | 1 | -0/+77 |
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