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path: root/drivers/clk/mediatek/clk-mt7629-eth.c
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* clk: Explicitly include correct DT includesRob Herring2023-07-191-2/+0
* clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-131-0/+1
* clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno2023-03-131-16/+4
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-301-3/+4
* clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen2022-06-151-1/+1
* clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen2022-06-151-2/+4
* clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen2022-06-151-1/+7
* clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen2022-06-151-1/+1
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-191-4/+4
* clk: mediatek: add clock support for MT7629 SoCRyder Lee2018-11-291-0/+159
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