| Commit message (Expand) | Author | Age | Files | Lines |
* | clk: mediatek: Export required symbols to compile clk drivers as module | AngeloGioacchino Del Regno | 2022-09-26 | 1 | -0/+1 |
* | clk: mediatek: reset: Add new register reset function with device | Rex-BC Chen | 2022-06-15 | 1 | -0/+60 |
* | clk: mediatek: reset: Change return type for clock reset register function | Rex-BC Chen | 2022-06-15 | 1 | -6/+9 |
* | clk: mediatek: reset: Support inuput argument index mode | Rex-BC Chen | 2022-06-15 | 1 | -1/+20 |
* | clk: mediatek: reset: Support nonsequence base offsets of reset registers | Rex-BC Chen | 2022-06-15 | 1 | -5/+6 |
* | clk: mediatek: reset: Revise structure to control reset register | Rex-BC Chen | 2022-06-15 | 1 | -12/+21 |
* | clk: mediatek: reset: Merge and revise reset register function | Rex-BC Chen | 2022-06-15 | 1 | -22/+19 |
* | clk: mediatek: reset: Extract common drivers to update function | Rex-BC Chen | 2022-06-15 | 1 | -16/+22 |
* | clk: mediatek: reset: Refine and reorder functions in reset.c | Rex-BC Chen | 2022-06-15 | 1 | -32/+36 |
* | clk: mediatek: reset: Fix written reset bit offset | Rex-BC Chen | 2022-06-15 | 1 | -2/+2 |
* | clk: mediatek: reset: Add reset.h | Rex-BC Chen | 2022-06-15 | 1 | -8/+1 |
* | clk: mediatek: Use %pe to print errors | Chen-Yu Tsai | 2022-02-17 | 1 | -2/+1 |
* | clk: mediatek: support COMMON_CLK_MEDIATEK module build | Miles Chen | 2021-09-14 | 1 | -0/+2 |
* | clk: mediatek: Get regmap without syscon compatible check | Chun-Jie Chen | 2021-07-27 | 1 | -1/+1 |
* | clk: reset: Modify reset-controller driver | yong.liang | 2019-08-08 | 1 | -3/+53 |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 2019-05-30 | 1 | -9/+1 |
* | clk: Convert to using %pOF instead of full_name | Rob Herring | 2017-07-21 | 1 | -1/+1 |
* | clk: mediatek: Make reset_control_ops const | Philipp Zabel | 2016-03-29 | 1 | -1/+1 |
* | clk: mediatek: Add reset controller support | Sascha Hauer | 2015-05-05 | 1 | -0/+97 |