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path:
root
/
drivers
/
clk
/
meson
/
Makefile
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: meson: add clk-input helper function
Jerome Brunet
2018-12-05
1
-0
/
+1
*
clk: meson: Add vid_pll divider driver
Neil Armstrong
2018-11-23
1
-1
/
+1
*
clk: meson: remove unused clk-audio-divider driver
Jerome Brunet
2018-07-09
1
-2
/
+1
*
clk: meson: axg: add the audio clock controller driver
Jerome Brunet
2018-07-09
1
-0
/
+1
*
clk: meson: add axg audio sclk divider driver
Jerome Brunet
2018-07-09
1
-1
/
+1
*
clk: meson: add triple phase clock driver
Jerome Brunet
2018-07-09
1
-0
/
+1
*
clk: meson: add clk-phase clock driver
Jerome Brunet
2018-07-09
1
-0
/
+1
*
clk: meson-axg: Add AO Clock and Reset controller driver
Qiufang Dai
2018-05-15
1
-1
/
+1
*
clk: meson: aoclk: refactor common code into dedicated file
Yixun Lan
2018-05-15
1
-0
/
+1
*
clk: meson: remove obsolete cpu_clk
Jerome Brunet
2018-03-13
1
-1
/
+1
*
clk: meson: switch gxbb ao_clk to clk_regmap
Jerome Brunet
2018-03-13
1
-1
/
+1
*
clk: meson: add regmap clocks
Jerome Brunet
2018-03-13
1
-0
/
+1
*
clk: meson-axg: add clock controller drivers
Qiufang Dai
2017-12-14
1
-0
/
+1
*
clk: meson: gxbb-aoclk: Add CEC 32k clock
Neil Armstrong
2017-08-04
1
-1
/
+1
*
clk: meson: gxbb-aoclk: Switch to regmap for register access
Neil Armstrong
2017-08-04
1
-1
/
+1
*
clk: meson: add audio clock divider support
Jerome Brunet
2017-04-07
1
-1
/
+1
*
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
Alexander Müller
2016-09-01
1
-1
/
+1
*
clk: meson: Add GXBB AO Clock and Reset controller driver
Neil Armstrong
2016-08-19
1
-1
/
+1
*
clk: gxbb: add AmLogic GXBB clk controller driver
Michael Turquette
2016-06-22
1
-0
/
+1
*
clk: meson: add mpll support
Michael Turquette
2016-06-22
1
-1
/
+1
*
clk: meson: only build selected platforms
Michael Turquette
2016-06-22
1
-2
/
+2
*
clk: meson8b: clean up composite clocks
Michael Turquette
2016-06-22
1
-1
/
+1
*
clk: meson8b: Add support for Meson8b clocks
Carlo Caione
2015-06-05
1
-0
/
+1
*
clk: meson: Add support for Meson clock controller
Carlo Caione
2015-06-05
1
-0
/
+5