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path: root/drivers/clk/mmp/clk-of-pxa168.c
Commit message (Expand)AuthorAgeFilesLines
* clk: pxa168: Move number of clocks to driver sourceDuje Mihanović2023-08-221-1/+3
* clk: mmp: pxa168: control shared SDH bits with separate clockDoug Brown2022-09-301-4/+7
* clk: mmp: pxa168: add clocks for SDH2 and SDH3Doug Brown2022-09-301-0/+6
* clk: mmp: pxa168: fix GPIO clock enable bitsDoug Brown2022-09-301-1/+1
* clk: mmp: pxa168: add muxes for more peripheralsDoug Brown2022-09-301-10/+32
* clk: mmp: pxa168: fix incorrect parent clocksDoug Brown2022-09-301-6/+6
* clk: mmp: pxa168: fix const-correctnessDoug Brown2022-09-301-7/+7
* clk: mmp: pxa168: add new clocks for peripheralsDoug Brown2022-09-301-0/+3
* clk: mmp: pxa168: fix incorrect dividersDoug Brown2022-09-301-2/+2
* clk: mmp: pxa168: add additional register definesDoug Brown2022-09-301-7/+24
* treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (pa...Thomas Gleixner2022-06-101-4/+1
* clk: mmp: pxa168: fix return value check in pxa168_clk_init()Wei Yongjun2016-11-011-1/+1
* clk: mmp: Remove CLK_IS_ROOTStephen Boyd2016-04-151-4/+4
* clk: mmp: add timer clock for pxa168/mmp2/pxa910Chao Xie2015-06-041-0/+7
* clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168Chao Xie2015-06-041-0/+1
* clk: mmp: add pxa168 DT support for clock driverChao Xie2014-11-121-0/+279