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path:
root
/
drivers
/
clk
/
qcom
/
clk-pll.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Thomas Gleixner
2019-06-05
1
-9
/
+1
*
clk: qcom: Enable FSM mode for votable alpha PLLs
Rajendra Nayak
2016-11-01
1
-28
/
+3
*
clk: qcom: Convert to clk_hw based provider APIs
Stephen Boyd
2015-08-24
1
-6
/
+2
*
Merge branch 'clk-determine-rate-struct' into clk-next
Stephen Boyd
2015-07-28
1
-7
/
+11
|
\
|
*
clk: change clk_ops' ->determine_rate() prototype
Boris Brezillon
2015-07-27
1
-7
/
+11
*
|
clk: qcom: Add support for SR2 PLLs
Georgi Djakov
2015-07-07
1
-0
/
+75
|
/
*
clk: qcom: fix simple_return.cocci warnings
Fengguang Wu
2015-03-26
1
-5
/
+1
*
clk: Add rate constraints to clocks
Tomeu Vizoso
2015-02-02
1
-0
/
+1
*
clk: Change clk_ops->determine_rate to return a clk_hw as the best parent
Tomeu Vizoso
2014-12-03
1
-1
/
+1
*
clk: qcom: Add support for setting rates on PLLs
Stephen Boyd
2014-09-22
1
-1
/
+67
*
clk: qcom: pll: Add support for configuring SR PLLs
Stephen Boyd
2014-07-15
1
-3
/
+12
*
clk: qcom: Add support for phase locked loops (PLLs)
Stephen Boyd
2014-01-16
1
-0
/
+222