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path: root/drivers/clk/rockchip/clk-rk3328.c
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: fix frac settings of GPLL clock for rk3328Katsuhiro Suzuki2019-01-071-6/+6
* clk: rockchip: add clock-id to gate of ACODEC for rk3328Katsuhiro Suzuki2018-11-261-1/+1
* clk: rockchip: fix I2S1 clock gate register for rk3328Katsuhiro Suzuki2018-11-191-1/+1
* clk: rockchip: fix wrong mmc sample phase shift for rk3328Ziyuan Xu2018-10-111-4/+4
* clk: rockchip: Fix wrong parents for MMC phase clock for rk3328Shawn Lin2018-03-231-8/+8
* clk: rockchip: add flags for rk3328 dclk_lcdcZheng Yang2018-02-121-1/+1
* clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocksHeiko Stuebner2018-02-121-2/+2
* clk: rockchip: protect all remaining rk3328 interconnect clocksHeiko Stuebner2018-02-121-19/+37
* clk: rockchip: export sclk_hdmi_sfc on rk3328Heiko Stuebner2018-02-121-1/+1
* clk: rockchip: fix hclk_vio_niu on rk3328Heiko Stuebner2018-02-121-1/+2
* clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328Elaine Zhang2017-03-101-0/+9
* clk: rockchip: add clock controller for rk3328Elaine Zhang2017-01-051-0/+895