summaryrefslogtreecommitdiffstats
path: root/drivers/clk/rockchip/clk.h
Commit message (Expand)AuthorAgeFilesLines
* clk: rockchip: Fix PLL bandwidthDouglas Anderson2015-07-281-4/+4
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-2/+2
|\
| * clk: rockchip: Properly include clk.hStephen Boyd2015-07-201-2/+2
* | clk: rockchip: add rk3368 clock controllerHeiko Stuebner2015-07-061-0/+16
* | clk: rockchip: add support for phase invertersHeiko Stuebner2015-07-061-0/+20
* | clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variantHeiko Stuebner2015-07-061-0/+20
* | clk: rockchip: protect register macros against multipart valuesHeiko Stuebner2015-07-061-8/+8
|/
* clk: make several parent names constUwe Kleine-König2015-06-041-10/+10
* clk: don't use __initconst for non-const arraysUwe Kleine-König2015-04-121-2/+2
* clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan2014-11-281-0/+23
* clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner2014-11-251-0/+6
* clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner2014-11-251-2/+5
* clk: rockchip: change PLL setting for better clock jitterKever Yang2014-10-291-0/+9
* clk: rockchip: add restart handlerHeiko Stübner2014-10-011-0/+1
* clk: rockchip: add new clock-type for the cpuclkHeiko Stuebner2014-09-271-0/+37
* clk: rockchip: protect critical clocks from getting disabledHeiko Stübner2014-09-021-0/+1
* clk: rockchip: add clock controller for rk3288Heiko Stübner2014-07-131-0/+9
* clk: rockchip: add reset controllerHeiko Stübner2014-07-131-0/+14
* clk: rockchip: add clock type for pll clocks and pll used on rk3066Heiko Stübner2014-07-131-0/+74
* clk: rockchip: add basic infrastructure for clock branchesHeiko Stübner2014-07-131-0/+250
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-20 01:03:54 +0000