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path: root/drivers/clk/socfpga
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*-. Merge branches 'clk-debugfs', 'clk-spreadtrum', 'clk-sifive', 'clk-counted' a...Stephen Boyd2023-10-303-10/+12
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| | * clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock...Gustavo A. R. Silva2023-10-232-9/+9
| | * clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_dataGustavo A. R. Silva2023-10-231-1/+3
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* / clk: socfpga: gate: Account for the divider in determine_rateMaxime Ripard2023-10-121-4/+23
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* clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()Yangtao Li2023-08-221-3/+1
* clk: Explicitly include correct DT includesRob Herring2023-07-192-4/+2
* clk: socfpga: gate: Add a determine_rate hookMaxime Ripard2023-06-081-0/+1
* clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-8/+22
* clk: socfpga: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-10/+22
* clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-7/+19
* clk: socfpga: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-13/+22
* clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-9/+13
* clk: socfpga: use of_clk_add_hw_provider and improve error handlingMarco Pagani2023-03-211-6/+20
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2022-12-131-1/+4
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| * clk: socfpga: Fix memory leak in socfpga_gate_init()Xiu Jianfeng2022-12-081-1/+4
* | clk: socfpga: remove the setting of clk-phase for sdmmc_clkDinh Nguyen2022-12-073-130/+0
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* clk: cleanup commentsTom Rix2022-03-111-1/+1
* clk: socfpga: cleanup spdx tagsTom Rix2022-03-113-3/+3
* clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_reso...Cai Huoqing2022-01-051-3/+1
* clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_r...Cai Huoqing2022-01-051-3/+1
* clk: socfpga: remove redundant assignment after a mask operationColin Ian King2022-01-051-2/+2
* clk: socfpga: remove redundant assignment on divisionColin Ian King2022-01-051-1/+1
* clk: socfpga: agilex: fix duplicate s2f_user0_clkDinh Nguyen2021-09-241-9/+0
* clk: socfpga: agilex: add the bypass register for s2f_usr0 clockDinh Nguyen2021-07-261-1/+1
* clk: socfpga: agilex: fix up s2f_user0_clk representationDinh Nguyen2021-07-261-0/+9
* clk: socfpga: agilex: fix the parents of the psi_ref_clkDinh Nguyen2021-07-261-4/+4
* clk: socfpga: clk-pll: Remove unused variable 'rc'Jian Xin2021-06-271-2/+1
* clk: agilex/stratix10/n5x: fix how the bypass_reg is handledDinh Nguyen2021-06-271-3/+8
* clk: agilex/stratix10: add support for the 2nd bypassDinh Nguyen2021-06-273-2/+123
* clk: agilex/stratix10: fix bypass representationDinh Nguyen2021-06-272-21/+91
* clk: agilex/stratix10: remove noc_clkDinh Nguyen2021-06-272-34/+30
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-04-2812-180/+202
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| *-. Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' a...Stephen Boyd2021-04-2712-181/+203
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| | | * clk: socfpga: fix iomem pointer cast on 64-bitKrzysztof Kozlowski2021-03-291-1/+1
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| | * clk: socfpga: remove redundant initialization of variable divColin Ian King2021-04-072-2/+2
| | * clk: socfpga: arria10: Fix memory leak of socfpga_clk on error returnColin Ian King2021-04-071-0/+1
| | * clk: socfpga: Fix code formattingStephen Boyd2021-03-301-1/+2
| | * clk: socfpga: Convert to s10/agilex/n5x to use clk_hwDinh Nguyen2021-03-306-147/+159
| | * clk: socfpga: arria10: convert to use clk_hwDinh Nguyen2021-03-303-15/+16
| | * clk: socfpga: use clk_hw_register for a5/c5Dinh Nguyen2021-03-303-15/+22
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* | clk: socfpga: fix iomem pointer cast on 64-bitKrzysztof Kozlowski2021-04-091-1/+1
* | clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)Krzysztof Kozlowski2021-03-232-3/+7
* | clk: socfpga: allow compile testing of Stratix 10 / Agilex clocksKrzysztof Kozlowski2021-03-231-3/+12
* | arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGAKrzysztof Kozlowski2021-03-231-2/+2
* | clk: socfpga: build together Stratix 10, Agilex and N5X clock driversKrzysztof Kozlowski2021-03-232-7/+6
* | clk: socfpga: allow building N5X clocks with ARCH_N5XKrzysztof Kozlowski2021-03-232-2/+8
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*-. Merge branches 'clk-socfpga', 'clk-mstar', 'clk-qcom' and 'clk-warnings' into...Stephen Boyd2021-02-166-7/+240
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| | * clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc'Lee Jones2021-02-111-2/+1
| | * clk: socfpga: clk-pll: Remove unused variable 'rc'Lee Jones2021-02-111-2/+1
| |/ |/|
| * clk: socfpga: agilex: add clock driver for eASIC N5X platformDinh Nguyen2021-02-124-3/+238
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