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path: root/drivers/clk/sunxi-ng
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-1716-221/+397
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| * Merge tag 'sunxi-ng-parent-rewrite-part-1-take-2' of https://git.kernel.org/p...Stephen Boyd2019-06-2416-220/+396
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| | * clk: sunxi-ng: sun8i-r: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai2019-06-221-14/+23
| | * clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai2019-06-221-12/+20
| | * clk: sunxi-ng: gate: Add macros for referencing local clock parentsChen-Yu Tsai2019-06-221-0/+53
| | * clk: sunxi-ng: h6-r: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-1/+1
| | * clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-25/+44
| | * clk: sunxi-ng: a64: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-15/+26
| | * clk: sunxi-ng: f1c100s: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-10/+19
| | * clk: sunxi-ng: sun8i-r: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-1/+1
| | * clk: sunxi-ng: v3s: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-10/+19
| | * clk: sunxi-ng: r40: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-17/+29
| | * clk: sunxi-ng: h3: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-10/+19
| | * clk: sunxi-ng: a33: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-12/+22
| | * clk: sunxi-ng: a23: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-12/+22
| | * clk: sunxi-ng: a31: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-14/+25
| | * clk: sunxi-ng: sun5i: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-12/+22
| | * clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-14/+25
| | * clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_*Chen-Yu Tsai2019-06-181-40/+25
| | * clk: sunxi-ng: switch to of_clk_hw_register() for registering clksChen-Yu Tsai2019-06-181-1/+1
| * | clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate registerOndrej Jirman2019-06-051-1/+1
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* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner2019-06-0528-252/+28
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-3015-150/+15
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-3013-65/+13
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
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* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-1526-0/+26
*-. Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...Stephen Boyd2019-05-072-3/+3
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| | * clk: sunxi-ng: Use the correct style for SPDX License IdentifierNishad Kamdar2019-05-012-3/+3
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*-. \ Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a...Stephen Boyd2019-05-076-13/+23
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| | * clk: sunxi-ng: sun5i: Export the MBUS clockMaxime Ripard2019-04-101-4/+0
| | * clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclkChen-Yu Tsai2019-04-091-2/+3
| | * clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rateJernej Skrabec2019-04-041-3/+3
| | * clk: sunxi-ng: h6: Preset hdmi-cec clock parentJernej Skrabec2019-04-031-0/+11
| | * clk: sunxi-ng: f1c100s: fix USB PHY gate bit offsetIcenowy Zheng2019-03-181-1/+1
| | * clk: sunxi-ng: Allow DE clock to set parent rateJernej Skrabec2019-03-183-3/+5
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* | clk: sunxi-ng: nkmp: Explain why zero width check is neededJernej Skrabec2019-04-041-0/+6
* | clk: sunxi-ng: nkmp: Avoid GENMASK(-1, 0)Jernej Skrabec2019-04-031-5/+13
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*-. Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', '...Stephen Boyd2019-03-081-1/+1
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| | * clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating itChen-Yu Tsai2019-01-251-1/+1
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* | clk: sunxi: A31: Fix wrong AHB gate numberAndre Przywara2019-01-281-2/+2
* | clk: sunxi-ng: v3s: Fix TCON reset de-assert bitPaul Kocialkowski2019-01-221-1/+1
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* clk: sunxi-ng: a64: Allow parent change for VE clockJernej Skrabec2018-12-101-1/+1
* clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai2018-12-051-3/+3
* clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLLChen-Yu Tsai2018-12-051-13/+24
* clk: sunxi-ng: h3: Allow parent change for ve clockJernej Skrabec2018-12-041-1/+1
* clk: sunxi-ng: add support for suniv F1C100s SoCMesih Kilinc2018-12-044-0/+581
* clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai2018-12-031-1/+1
* clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC outputChen-Yu Tsai2018-11-301-0/+11
* clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLLChen-Yu Tsai2018-11-231-13/+24
* clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki2018-11-131-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-02 01:57:09 +0000