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path: root/drivers/clk/tegra
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* clk: tegra: Don't reset PLL-CX if it is already enabledJon Hunter2017-04-041-4/+4
* clk: tegra: Add missing Tegra210 clocksPeter De Schrijver2017-04-043-0/+19
* clk: tegra: Propagate clk_out_x rate to parentAlex Frid2017-04-041-2/+4
* clk: tegra: Fix build warnings on Tegra20/Tegra30Thierry Reding2017-03-202-2/+2
* clk: tegra: Mark TEGRA210_CLK_DBGAPB as always onPeter De Schrijver2017-03-201-0/+2
* clk: tegra: Add SATA seq input controlPeter De Schrijver2017-03-201-0/+25
* clk: tegra: Add Tegra210 special resetsPeter De Schrijver2017-03-201-0/+85
* clk: tegra: Rework pll_uPeter De Schrijver2017-03-202-197/+272
* clk: tegra: Implement reset control resetMikko Perttunen2017-03-201-0/+16
* clk: tegra: Fix disable unused for clocks sharing enable bitPeter De Schrijver2017-03-201-0/+3
* clk: tegra: Handle UTMIPLL IDDQPeter De Schrijver2017-03-201-0/+26
* clk: tegra: Add aclkPeter De Schrijver2017-03-201-0/+10
* clk: tegra: Add super clock mux/dividerPeter De Schrijver2017-03-202-5/+89
* clk: tegra: Define Tegra210 DMIC clocksPeter De Schrijver2017-03-203-1/+28
* clk: tegra: Fix constness for peripheral clocksPeter De Schrijver2017-03-202-4/+4
* clk: tegra: Define Tegra210 DMIC sync clocksPeter De Schrijver2017-03-203-24/+73
* clk: tegra: Add CEC clockPeter De Schrijver2017-03-206-0/+6
* clk: tegra: Fix type for m fieldPeter De Schrijver2017-03-201-1/+1
* clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculationPeter De Schrijver2017-03-201-1/+7
* clk: tegra: Don't warn for PLL defaults unnecessarilyPeter De Schrijver2017-03-201-6/+12
* clk: tegra: Remove non-existing pll_m_out1 clockPeter De Schrijver2017-03-201-5/+0
* clk: tegra: Correct afi clock parentPeter De Schrijver2017-03-201-1/+1
* clk: tegra: Fix ISP clock modellingPeter De Schrijver2017-03-203-2/+11
* clk: tegra: Fix pll_a1 iddq register, add pll_a1Peter De Schrijver2017-03-201-1/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2017-02-253-0/+625
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| * clk: tegra: Add BPMP clock driverThierry Reding2017-02-033-0/+625
* | PM / OPP: Update OPP users to put referenceViresh Kumar2017-01-301-11/+6
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* clk: tegra: dfll: Use builtin_platform_driver to simplify the codeWei Yongjun2016-11-101-6/+1
* clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modularPaul Gortmaker2016-11-041-14/+2
* clk: tegra: dfll: improve function-level documentationJulia Lawall2016-11-011-5/+5
* clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2Vince Hsu2016-08-241-2/+2
* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-306-598/+531
* clk: tegra: Micro-optimize Tegra210 clock setupThierry Reding2016-06-231-4/+4
* clk: tegra: Make sor_safe the parent of dpaux and dpaux1Thierry Reding2016-06-231-2/+2
* clk: tegra: Mark timer clock as criticalThierry Reding2016-06-221-1/+1
* clk: tegra: Enable sor1 and sor1_src on Tegra210Thierry Reding2016-06-171-0/+2
* clk: tegra: Squash sor1 safe/brick/src into a single muxThierry Reding2016-06-172-12/+12
* clk: tegra: Disable spread spectrum on pll_d2Thierry Reding2016-06-171-2/+3
* clk: tegra: Fixup post dividers on Tegra210Thierry Reding2016-06-101-47/+47
* remove lots of IS_ERR_VALUE abusesArnd Bergmann2016-05-271-1/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2016-05-2019-114/+369
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| * Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2016-05-0219-114/+427
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| | * clk: tegra: dfll: Reformat CVB frequency tableThierry Reding2016-04-281-25/+25
| | * clk: tegra: dfll: Properly clean up on failure and removalThierry Reding2016-04-284-4/+48
| | * clk: tegra: dfll: Make code more comprehensibleThierry Reding2016-04-283-41/+37
| | * clk: tegra: dfll: Reference CVB table instead of copying dataThierry Reding2016-04-283-27/+17
| | * clk: tegra: dfll: Update kerneldocThierry Reding2016-04-281-5/+5
| | * clk: tegra: Fix PLL_U post divider and initial rate on Tegra30Lucas Stach2016-04-281-5/+6
| | * clk: tegra: Initialize PLL_C to sane rate on Tegra30Lucas Stach2016-04-281-0/+1
| | * clk: tegra: Fix pllre Tegra210 and add pll_re_out1Rhyland Klein2016-04-283-2/+66