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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-09-111-4/+0
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| * clk: qcom: gcc-sm6350: Remove unused variableKonrad Dybcio2021-09-031-4/+0
* | Merge tag 'mfd-next-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/le...Linus Torvalds2021-09-071-1/+2
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| * | mfd: db8500-prcmu: Handle missing FW variantLinus Walleij2021-08-091-1/+2
* | | Merge tag 'mips_5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...Linus Torvalds2021-09-033-1/+10
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| * | | clk: pistachio: Make it selectable for generic MIPS kernelJiaxun Yang2021-08-123-1/+10
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* | | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-09-0288-577/+18204
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| *-------. \ Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-rali...Stephen Boyd2021-09-0113-42/+56
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| | | | | | * | clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gatesSergio Paracuellos2021-08-281-8/+1
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| | | | | * | clk: zynqmp: Fix a memory leakShubhrajyoti Datta2021-08-281-1/+1
| | | | | * | clk: zynqmp: Check the return typeShubhrajyoti Datta2021-08-281-3/+1
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| | | | * | clk: zynqmp: Fix kernel-doc formatMichal Simek2021-08-281-2/+2
| | | | * | clk: at91: sama7g5: remove all kernel-doc & kernel-doc warningsRandy Dunlap2021-08-281-7/+7
| | | | * | clk: zynqmp: fix kernel docRajan Vaja2021-08-281-0/+1
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| | | * | clk: imx8mn: Add M7 core clockMarek Vasut2021-08-241-0/+5
| | | * | clk: imx8m: fix clock tree update of TF-A managed clocksAhmad Fatoum2021-08-245-12/+28
| | | * | clk: imx: clk-divider-gate: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-241-5/+5
| | | * | clk: imx8mn: use correct mux type for clkout pathLucas Stach2021-08-241-2/+2
| | | * | clk: imx8mm: use correct mux type for clkout pathLucas Stach2021-08-241-2/+2
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| | * / clk: kirkwood: Fix a clocking boot regressionLinus Walleij2021-08-281-0/+1
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| *-----. \ Merge branches 'clk-nvidia', 'clk-rockchip', 'clk-at91' and 'clk-vc5' into cl...Stephen Boyd2021-09-017-18/+46
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| | | | | * | clk: vc5: Add properties for configuring SD/OE behaviorSean Anderson2021-08-281-0/+24
| | | | | * | clk: vc5: Use dev_err_probeSean Anderson2021-08-281-10/+10
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| | | | * / clk: at91: clk-generated: Limit the requested rate to our rangeCodrin Ciubotariu2021-08-281-0/+6
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| | | * | clk: rockchip: make rk3308 ddrphy4x clock criticalYunhao Tian2021-07-291-0/+1
| | | * | clk: rockchip: drop GRF dependency for rk3328/rk3036 pll typesPeter Geis2021-07-291-1/+1
| | | * | clk: rockchip: Add support for hclk_sfc on rk3036Jon Lin2021-07-161-1/+1
| | | * | clk: rockchip: rk3036: fix up the sclk_sfc parent errorJon Lin2021-07-161-1/+2
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| | * | clk: tegra: fix old-style declarationArnd Bergmann2021-08-291-1/+1
| | * | clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clockDmitry Osipenko2021-08-111-5/+1
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| * | Merge branch 'clk-frac-divider' into clk-nextStephen Boyd2021-09-014-23/+66
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| | * | clk: fractional-divider: Document the arithmetics used behind the codeAndy Shevchenko2021-08-121-1/+34
| | * | clk: fractional-divider: Introduce POWER_OF_TWO_PS flagAndy Shevchenko2021-08-121-4/+6
| | * | clk: fractional-divider: Hide clk_fractional_divider_ops from wide audienceAndy Shevchenko2021-08-122-0/+3
| | * | clk: fractional-divider: Export approximation algorithm to the CCF usersAndy Shevchenko2021-08-123-18/+23
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| *---. \ Merge branches 'clk-renesas', 'clk-cleanup' and 'clk-determine-divider' into ...Stephen Boyd2021-09-0116-55/+126
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| | | | * | clk: stm32mp1: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-051-7/+3
| | | | * | clk: stm32h7: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-051-4/+4
| | | | * | clk: stm32f4: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-051-4/+4
| | | | * | clk: bcm2835: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-051-5/+4
| | | | * | clk: divider: Implement and wire up .determine_rate by defaultMartin Blumenstingl2021-08-051-0/+23
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| | | * / clk: palmas: Add a missing SPDX license headerJason Wang2021-08-051-9/+1
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| | * | clk: renesas: Make CLK_R9A06G032 invisibleGeert Uytterhoeven2021-08-131-3/+1
| | * | clk: renesas: r9a07g044: Add entry for fixed clock P0_DIV2Lad Prabhakar2021-07-261-1/+2
| | * | clk: renesas: r9a07g044: Add clock and reset entries for ADCLad Prabhakar2021-07-191-0/+6
| | * | clk: renesas: r9a07g044: Add clock and reset entries for CANFDLad Prabhakar2021-07-191-0/+4
| | * | clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]Geert Uytterhoeven2021-07-194-3/+3
| | * | clk: renesas: r9a07g044: Add GPIO clock and reset entriesLad Prabhakar2021-07-191-0/+5
| | * | clk: renesas: r9a07g044: Add SSIF-2 clock and reset entriesBiju Das2021-07-191-0/+20
| | * | clk: renesas: r9a07g044: Add USB clocks/resetsBiju Das2021-07-191-0/+12
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 05:57:28 +0000