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* clk: Fix potential NULL dereference in clk_fetch_parent_index()Martin Blumenstingl2019-08-161-1/+2
* clk: Fix falling back to legacy parent string matchingStephen Boyd2019-08-161-12/+34
* clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen2019-08-141-1/+1
* clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMUMarek Szyprowski2019-08-081-14/+34
* clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMUSylwester Nawrocki2019-08-081-11/+43
* clk: samsung: Change signature of exynos5_subcmus_init() functionSylwester Nawrocki2019-08-084-36/+49
* clk: renesas: cpg-mssr: Fix reset control race conditionGeert Uytterhoeven2019-07-221-14/+2
* clk: sprd: Select REGMAP_MMIO to avoid compile errorsChunyan Zhang2019-07-221-0/+1
* clk: mediatek: mt8183: Register 13MHz clock earlier for clocksourceWeiyi Lu2019-07-221-12/+34
* clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1Codrin Ciubotariu2019-07-221-0/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-17113-3040/+6985
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| *-----. Merge branches 'clk-bcm63xx', 'clk-silabs', 'clk-lochnagar' and 'clk-rockchip...Stephen Boyd2019-07-1216-175/+1810
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| | | | | * clk: rockchip: export HDMIPHY clock on rk3228Heiko Stuebner2019-06-271-1/+1
| | | | | * clk: rockchip: add watchdog pclk on rk3328Heiko Stuebner2019-06-271-0/+3
| | | | | * clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner2019-06-154-36/+12
| | | | | * clk: rockchip: add a type from SGRF-controlled gate clocksHeiko Stuebner2019-06-141-0/+4
| | | | | * clk: rockchip: Remove 48 MHz PLL rate from rk3288Douglas Anderson2019-06-061-1/+0
| | | | | * clk: rockchip: add 1.464GHz cpu-clock rate to rk3228Justin Swartz2019-05-201-0/+1
| | | | | * clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase()Douglas Anderson2019-05-201-3/+3
| | | | | * clk: rockchip: Don't yell about bad mmc phases when gettingDouglas Anderson2019-05-201-3/+1
| | | | | * clk: rockchip: Use clk_hw_get_rate() in MMC phase calculationDouglas Anderson2019-05-201-2/+2
| | | | * | clk: lochnagar: Use new parent_data approach to register clock parentsCharles Keepax2019-06-251-119/+86
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| | | * | clk: Add Si5341/Si5340 driverMike Looijmans2019-06-273-0/+1358
| | | * | clk: clk-si544: Implement small frequency change supportMike Looijmans2019-06-271-10/+92
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| | * / clk: add BCM63XX gated clock controller driverJonas Gorski2019-06-273-0/+247
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| *-------. \ Merge branches 'clk-rpi-cpufreq', 'clk-tegra', 'clk-simplify-provider.h', 'cl...Stephen Boyd2019-07-1216-106/+571
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| | | | | | * | clk: at91: sckc: use dedicated functions to unregister clockClaudiu Beznea2019-06-271-2/+2
| | | | | | * | clk: at91: sckc: improve error path for sama5d4 sck registrationClaudiu Beznea2019-06-271-15/+28
| | | | | | * | clk: at91: sckc: remove unnecessary lineClaudiu Beznea2019-06-271-1/+0
| | | | | | * | clk: at91: sckc: improve error path for sam9x5 sck registerClaudiu Beznea2019-06-271-18/+32
| | | | | | * | clk: at91: sckc: add support to free slow clock osclillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | clk: at91: sckc: add support to free slow rc oscillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | clk: at91: sckc: add support to free slow oscillatorClaudiu Beznea2019-06-271-0/+8
| | | | | | * | clk: at91: sckc: add support for SAM9X60Claudiu Beznea2019-06-261-0/+74
| | | | | | * | clk: at91: sckc: add support to specify registers bit offsetsClaudiu Beznea2019-06-261-32/+61
| | | | | | * | clk: at91: sckc: sama5d4 has no bypass supportClaudiu Beznea2019-06-261-6/+0
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| | | | | * | clk: sprd: Add check for return value of sprd_clk_regmap_init()Chunyan Zhang2019-06-271-1/+4
| | | | | * | clk: sprd: Check error only for devm_regmap_init_mmio()Chunyan Zhang2019-06-261-1/+1
| | | | | * | clk: sprd: Switch from of_iomap() to devm_ioremap_resource()Chunyan Zhang2019-06-261-1/+6
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| | | | * | clk: consoldiate the __clk_get_hw() declarationsStephen Rothwell2019-07-127-4/+6
| | | | * | clk: Unexport __clk_of_tableStephen Boyd2019-05-231-0/+1
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| | | * | clk: tegra: Do not enable PLL_RE_VCO on Tegra210Thierry Reding2019-06-251-1/+0
| | | * | clk: tegra: Warn if an enabled PLL is in IDDQThierry Reding2019-06-251-1/+5
| | | * | clk: tegra: Do not warn unnecessarilyThierry Reding2019-06-251-2/+3
| | | * | clk: tegra210: fix PLLU and PLLU_OUT1JC Kuo2019-06-251-4/+4
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| | * | clk: raspberrypi: register platform device for raspberrypi-cpufreqNicolas Saenz Julienne2019-06-251-0/+15
| | * | clk: bcm283x: add driver interfacing with Raspberry Pi's firmwareNicolas Saenz Julienne2019-06-253-0/+308
| | * | clk: bcm2835: remove pllbNicolas Saenz Julienne2019-06-251-24/+4
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| *-----. \ \ Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in...Stephen Boyd2019-07-129-194/+30
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| | | | | * | | clk: qoriq: add support for lx2160aVabhav Sharma2019-06-251-0/+12
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