linux.git - Linux kernel mainline tree

	Commit message (Expand)	Author	Age	Files	Lines
*	RISC-V: Remove CLINT related code from timer and arch	Anup Patel	2020-08-20	1	-15/+2
*	clocksource/drivers/timer-riscv: Use per-CPU timer interrupt	Anup Patel	2020-06-09	1	-3/+40
*	clocksource: riscv: add notrace to riscv_sched_clock	Zong Li	2020-01-04	1	-1/+1
*	riscv: add support for MMIO access to the timer registers	Christoph Hellwig	2019-11-13	1	-4/+19
*	riscv: abstract out CSR names for supervisor vs machine mode	Christoph Hellwig	2019-11-05	1	-4/+4
*	riscv: don't use the rdtime(h) pseudo-instructions	Christoph Hellwig	2019-09-05	1	-13/+4
*	RISC-V: Remove per cpu clocksource	Atish Patra	2019-08-06	1	-4/+2
*	clocksource/drivers/riscv: Fix clocksource mask	Atish Patra	2019-03-23	1	-3/+2
*	clocksource/drivers/riscv: Add required checks during clock source init	Atish Patra	2019-02-23	1	-3/+20
*	clocksource/drivers/riscv: Change name riscv_timer to timer-riscv	Daniel Lezcano	2018-12-18	1	-0/+118