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path: root/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
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* drm/amdgpu: Parse all deferred errors with UMC aca handleXiang Liu2025-03-261-1/+1
| | | | | | | | We should only increase the deferred errors in UMC block. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Decode deferred error type in aca bank parserXiang Liu2025-02-271-2/+2
| | | | | | | | | | | In the case of poison inband log, the error type need to be specified by checking the deferred or poison bit of status register. v2: check both deferred and poison bit Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Include ACA error type in aca bankHawking Zhang2025-02-171-0/+2
| | | | | | | | | | | | | | | ACA error types managed by driver a direct 1:1 correspondence with those managed by firmware. To address this, for each ACA bank, include both the ACA error type and the ACA SMU type. This addition is useful for creating CPER records. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Yang Wang <keivnyang.wang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Set snoop bit for SDMA for MI seriesHarish Kasiviswanathan2025-02-121-0/+27
| | | | | | | | | | | | | SDMA writes has to probe invalidate RW lines. Set snoop bit in mmhub for this to happen. v2: Missed a few mmhub_v9_4. Added now. v3: Calculate hub offset once since it doesn't change inside the loop Modified function names based on review comments. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move common ACA ipid defines into amdgpu_aca.hYang Wang2024-12-101-1/+0
| | | | | | | | | move common ACA ipid defines into amdgpu_aca.h file. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Retire query_utcl2_poison_status callbackHawking Zhang2024-08-231-17/+0
| | | | | | | | | Driver switches to interrupt source id to identify utcl2 poison event. polling interface is not needed. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove RAS unused paramter 'err_addr'Yang Wang2024-08-061-2/+2
| | | | | | | | | | | | | - amdgpu_ras_error_statistic_ue_count() - amdgpu_ras_error_statistic_ce_count() - amdgpu_ras_error_statistic_de_count() The parameter 'err_addr' is no longer used since following patch. Fixes: a7e8467fbeee ("drm/amdgpu: Remove unused code") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Correct register used to clear fault statusHawking Zhang2024-07-011-1/+1
| | | | | | | | | Driver should write to fault_cntl registers to do one-shot address/status clear. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix register access violationHawking Zhang2024-06-271-3/+5
| | | | | | | | | fault_status is read only register. fault_cntl is not accessible from guest environment. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: retire unused aca_bank_report data structureYang Wang2024-03-201-4/+3
| | | | | | | | retire unused aca_bank_report data structure. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add utcl2 RAS poison query for mmhubTao Zhou2024-03-201-0/+15
| | | | | | | | Add it for mmhub v1.8. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: refine aca error cache for mmhub v1.8Yang Wang2024-03-201-5/+7
| | | | | | | | refine aca error cache for mmhub v1.8 Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add new aca_smu_type supportYang Wang2024-03-201-15/+18
| | | | | | | | | | | | | Add new types to distinguish between ACA error type and smu mca type. e.g.: the ACA_ERROR_TYPE_DEFERRED is not matched any smu mca valid bank channel, so add new type 'aca_smu_type' to distinguish aca error type and smu mca type. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mmhub v1.8 ACA supportYang Wang2024-01-151-0/+87
| | | | | | | | | | | | v1: add mmhub v1.8 ACA driver support v2: use macro to define smn address value. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: MCA supports recording umc address informationYiPeng Chai2023-12-191-2/+2
| | | | | | | | | | | | MCA supports recording umc address information. V2: Move err_addr variable from struct ras_err_node to struct ras_err_info. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Do not program VF copy regs in mmhub v1.8 under SRIOV (v2)Victor Lu2023-11-171-3/+3
| | | | | | | | | | MC_VM_AGP_* registers should not be programmed by guest driver. v2: move early return outside of loop Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Samir Dhume <samir.dhume@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop status query/reset for GCEA 9.4.3 and MMEA 1.8Tao Zhou2023-10-201-143/+0
| | | | | | | | | | PMFW will be responsible for them. v2: remove query interfaces. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add RAS error info support for mmhub_v1_8Yang Wang2023-10-131-2/+13
| | | | | | | | | add RAS error info support for mmhub_v1_8. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add hub->ctx_distance in setup_vmid_configYifan Zhang2023-10-091-1/+1
| | | | | | | | | | | | add hub->ctx_distance when read CONTEXT1_CNTL, align w/ write back operation. v2: fix coding style errors reported by checkpatch.pl (Christian) Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Lang Yu <lang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove SRIOV VF FB location programmingZhigang Luo2023-08-071-12/+0
| | | | | | | | | | | For SRIOV VF, FB location is programmed by host driver, no need to program it in guest driver. v2: squash in unused variable removal Signed-off-by: Zhigang Luo <Zhigang.Luo@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Mark mmhub_v1_8_mmea_err_status_reg as __maybe_unusedSrinivasan Shanmugam2023-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | Silencing the compiler from below compilation error: drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c:704:23: error: variable 'mmhub_v1_8_mmea_err_status_reg' is not needed and will not be emitted [-Werror,-Wunneeded-internal-declaration] static const uint32_t mmhub_v1_8_mmea_err_status_reg[] = { ^ 1 error generated. Mark the variable as __maybe_unused to make it clear to clang that this is expected, so there is no more warning. Cc: Christian König <christian.koenig@amd.com> Cc: Lijo Lazar <lijo.lazar@amd.com> Cc: Luben Tuikov <luben.tuikov@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove unused definitionTao Zhou2023-06-091-8/+0
| | | | | | | | | mmhub_v1_8_mmea_cgtt_clk_cntl_reg is defined but not used. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Acked-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Fix errors & warnings in mmhub_v1_8.cSrinivasan Shanmugam2023-06-091-5/+7
| | | | | | | | | | | | | | | | | Fix below errors & warnings reported by checkpatch: ERROR: code indent should use tabs where possible WARNING: please, no space before tabs WARNING: please, no spaces at the start of a line WARNING: Prefer 'unsigned int' to bare use of 'unsigned' ERROR: space prohibited before that '++' (ctx:WxB) WARNING: Block comments use a trailing */ on a separate line Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Initialize mmhub v1_8 ras functionHawking Zhang2023-06-091-0/+13
| | | | | | | | Initialize mmhub v1_8 ras function. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add reset_ras_error_status for mmhub v1_8Hawking Zhang2023-06-091-0/+91
| | | | | | | | | Add reset_ras_error_status callback for mmhub v1_8. It will be used to reset mmhub error status. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add query_ras_error_status for mmhub v1_8Hawking Zhang2023-06-091-0/+56
| | | | | | | | | Add query_ras_error_status callback for mmhub v1_8. It will be used to log mmhub error status. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add reset_ras_error_count for mmhub v1_8Hawking Zhang2023-06-091-0/+28
| | | | | | | | | | Add reset_ras_error_count callback for mmhub v1_8. It will be used to reset mmhub ras error count. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add query_ras_error_count for mmhub v1_8Hawking Zhang2023-06-091-0/+93
| | | | | | | | | | Add query_ras_error_count callback for mmhub v1_8. It will be used to query and log mmhub error count and memory block. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Make UTCL2 snoop CPU cachesRajneesh Bhardwaj2023-06-091-1/+2
| | | | | | | | | | | On AMD APP APUs, to make UTCL2 snoop CPU caches, its not sufficient to rely on xgmi connected flag so add the logic to use is_app_apu to program the PDE_REQUEST_PHYSICAL bit correctly for gfxhub and mmhub both. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use mask for active clustersLijo Lazar2023-06-091-20/+36
| | | | | | | | | Use a mask of available active clusters instead of using only the number of active clusters. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix vm context register assignment in mmhub v1.8Le Ma2023-06-091-7/+7
| | | | | | | | Assign the vm context register addr per aid instance. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: do mmhub init for multiple AIDsLe Ma2023-06-091-261/+348
| | | | | | | | | Mmhub on each AID needs to be initialized respectively Signed-off-by: Le Ma <le.ma@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Set XNACK per process on GC 9.4.3Amber Lin2023-06-091-1/+1
| | | | | | | | | Set RETRY_PERMISSION_OR_INVALID_PAGE_FAULT bit in VM_CONTEXT1_CNTL as well so XNACK can be enabled in the SQ per process. Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: introduce vmhub definition for multi-partition cases (v3)Hawking Zhang2023-06-091-5/+5
| | | | | | | | | | | | | | | | | | | v1: Each partition has its own gfxhub or mmhub. adjust the num of MAX_VMHUBS and the GFXHUB/MMHUB layout (Le) v2: re-design the AMDGPU_GFXHUB/AMDGPU_MMHUB layout (Le) v3: apply the gfxhub/mmhub layout to new IPs (Hawking) v4: fix up gmc11 (Alex) v5: rebase (Alex) Signed-off-by: Le Ma <le.ma@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mmhub v1_8 supportLe Ma2023-03-311-0/+477
Hack the mmhub 1.7 reg offset for initial support v2: squash in header switch, CG funcs (Alex) Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-26 08:05:26 +0000