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* drm/amdgpu/pm: add workload profile pause helperAlex Deucher2025-04-091-0/+2
| | | | | | | | | To be used for display idle optimizations when we want to pause non-default profiles. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 6dafb5d4c7cdfc8f994e789d050e29e0d5ca6efd)
* drm/amd/pm: Add debug bit for smu pool allocationLijo Lazar2025-03-191-1/+2
| | | | | | | | | | In certain cases, it's desirable to avoid PMFW log transactions to system memory. Add a mask bit to decide whether to allocate smu pool in device memory or system memory. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add support for checking SDMA reset capabilityJesse.zhang@amd.com2025-02-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new function to check if the SMU supports resetting the SDMA engine. This capability check ensures that the driver does not attempt to reset the SDMA engine on hardware that does not support it. The following changes are included: - New function `amdgpu_dpm_reset_sdma_is_supported` to check SDMA reset support at the AMDGPU driver level. - New function `smu_reset_sdma_is_supported` to check SDMA reset support at the SMU level. - Implementation of `smu_v13_0_6_reset_sdma_is_supported` for the specific SMU version v13.0.6. - Updated `smu_v13_0_6_reset_sdma` to use the new capability check before attempting to reset the SDMA engine. v2: change smu_reset_sdma_is_supported type to bool (Tim) Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Jesse Zhang <jesse.zhang@amd.com> Reviewed-by: Tim Huang <tim.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add inst to amdgpu_dpm_enable_vcnBoyuan Zhang2024-12-101-1/+1
| | | | | | | | | | | | | | | | | | | Add an instance parameter to amdgpu_dpm_enable_vcn() function, and change all calls from vcn ip functions to add instance argument. vcn generations with only one instance (v1.0, v2.0) always use 0 as instance number. vcn generations with multiple instances (v2.5, v3.0, v4.0, v4.0.3, v4.0.5, v5.0.0) use the actual instance number. v2: remove for-loop in amdgpu_dpm_enable_vcn(), and temporarily move it to vcn ip with multiple instances, in order to keep the exact same logic as before, until further separation in next patch. v3: fix missing prefix Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add inst to dpm_set_powergating_by_smuBoyuan Zhang2024-12-101-1/+2
| | | | | | | | | | | | | | | | | | Add an instance parameter to amdgpu_dpm_set_powergating_by_smu() function, and use the instance to call set_powergating_by_smu(). v2: remove duplicated functions. remove for-loop in amdgpu_dpm_set_powergating_by_smu(), and temporarily move it to amdgpu_dpm_enable_vcn(), in order to keep the exact same logic as before, until further separation in next patch. v3: drop SI logic in amdgpu_dpm_enable_vcn(). Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: implement dpm sdma reset functionJiadong Zhu2024-12-101-0/+1
| | | | | | | | | | | Implement sdma soft reset by sending MSG_ResetSDMA on smu 13.0.6. v2: Add firmware version for the reset message. v3: Add ip version check. Print inst_mask on failure. Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add zero RPM stop temperature OD setting support for SMU13Wolfgang Müller2024-11-051-0/+2
| | | | | | | | | | Together with the feature to enable or disable zero RPM in the last commit, it also makes sense to expose the OD setting determining under which temperature the fan should stop if zero RPM is enabled. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Wolfgang Müller <wolf@oriole.systems> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add zero RPM OD setting support for SMU13Wolfgang Müller2024-11-051-0/+2
| | | | | | | | | | | | Whilst we have support for setting fan curves there is no support for disabling the zero RPM feature. Since the relevant bits are already present in the OverDriveTable, hook them up to a sysctl setting so users can influence this behaviour. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3489 Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Wolfgang Müller <wolf@oriole.systems> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: Remove legacy interface for xgmi plpdLijo Lazar2024-05-172-6/+0
| | | | | | | | | | | | Replace the legacy interface with amdgpu_dpm_set_pm_policy to set XGMI PLPD mode. Also, xgmi_plpd_policy sysfs node is not used by any client. Remove that as well. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: Add support for DPM policiesLijo Lazar2024-05-171-0/+5
| | | | | | | | | | | | | | Add support to set/get information about different DPM policies. The support is only available on SOCs which use swsmu architecture. A DPM policy type may be defined with different levels. For example, a policy may be defined to select Pstate preference and then later a pstate preference may be chosen. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/pm: Add support for MACO flag checkingMa Jun2024-04-091-1/+1
| | | | | | | | | Add support for MACO flag checking. MACO mode only works if BACO is supported. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add a new runtime mode definitionMa Jun2024-04-091-0/+4
| | | | | | | | | Add a new runtime pm mode AMDGPU_RUNPM_BAMACO and related macro definition Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: make amdgpu device attr_update() function more efficientYang Wang2024-04-091-0/+41
| | | | | | | | | | | | | | | v1: add a new enumeration type to identify device attribute node, this method is relatively more efficient compared with 'strcmp' in update_attr() function. v2: rename device_attr_type to device_attr_id. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Ma Jun <majun@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: implement smu send rma reason for smu v13.0.6Yang Wang2024-02-121-0/+1
| | | | | | | | | implement smu send rma reason function for smu v13.0.6 Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: support return vpe clock tablePeyton Lee2023-12-141-0/+1
| | | | | | | | pm supports return vpe clock table and soc clock table Signed-off-by: Peyton Lee <peytolee@amd.com> Reviewed-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: optimize RLC powerdown notification on VangoghPerry Yuan2023-11-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The smu needs to get the rlc power down message to sync the rlc state with smu, the rlc state updating message need to be sent at while smu begin suspend sequence , otherwise SMU will crash while RLC state is not notified by driver, and rlc state probally changed after that notification, so it needs to notify rlc state to smu at the end of the suspend sequence in amdgpu_device_suspend() that can make sure the rlc state is correctly set to SMU. [ 101.000590] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 101.000598] amdgpu 0000:03:00.0: amdgpu: Failed to disable gfxoff! [ 110.838026] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 110.838035] amdgpu 0000:03:00.0: amdgpu: Failed to disable smu features. [ 110.838039] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features! [ 110.838040] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62 [ 110.884394] PM: suspend of devices aborted after 21213.620 msecs [ 110.884402] PM: start suspend of devices aborted after 21213.882 msecs [ 110.884405] PM: Some devices failed to suspend, or early wake event detected Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: Add support to fetch pm metrics sampleLijo Lazar2023-11-291-0/+12
| | | | | | | | | Add API support to fetch a snapshot of power management metrics from PMFW. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: deprecate allow_xgmi_power_down interfaceLe Ma2023-09-281-2/+0
| | | | | | | | Replace with set_plpd_mode uniformly for places to use. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add xgmi_plpd_policy sysfs node for user to change plpd policyLe Ma2023-09-261-0/+5
| | | | | | | | | | | | | | | | Add xgmi_plpd_policy sysfs node for users to check and select xgmi per-link power down policy: - arg 0: disallow plpd - arg 1: default policy - arg 2: optimized policy v2: split from smu v13.0.6 code and miscellaneous updates v3: add usage comments around set/get functions Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add fan minimum pwm OD setting support for SMU13Evan Quan2023-08-311-0/+2
| | | | | | | | Add SMU13 fan minimum pwm OD setting support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add fan target temperature OD setting support for SMU13Evan Quan2023-08-311-0/+2
| | | | | | | | Add SMU13 fan target temperature OD setting support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add fan acoustic target OD setting support for SMU13Evan Quan2023-08-311-0/+2
| | | | | | | | Add SMU13 fan acoustic target OD setting support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add fan acoustic limit OD setting support for SMU13Evan Quan2023-08-311-0/+2
| | | | | | | | Add SMU13 fan acoustic limit OD setting support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13Evan Quan2023-08-311-0/+4
| | | | | | | | Add SMU13 fan temperature/pwm curve OD setting support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: introduce a new set of OD interfacesEvan Quan2023-08-311-0/+2
| | | | | | | | | | | There will be multiple interfaces(sysfs files) exposed with each representing a single OD functionality. And all those interface will be arranged in a tree liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities for the same component will be arranged under the same directory. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: open brace '{' following struct go on the same lineRan Sun2023-07-251-2/+1
| | | | | | | ERROR: open brace '{' following struct go on the same line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: open brace '{' following struct go on the same lineRan Sun2023-07-251-14/+7
| | | | | | | ERROR: open brace '{' following struct go on the same line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: expose swctf threshold setting for legacy powerplayEvan Quan2023-06-301-0/+2
| | | | | | | | | Preparation for coming optimization which eliminates the influence of GPU temperature momentary fluctuation. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: update SMU13 header files for coming OD supportEvan Quan2023-06-091-7/+9
| | | | | | | | Correct the data structures for OD feature support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: added a sysfs interface for thermal throttlingKun Liu2023-02-231-0/+3
| | | | | | | | | added a sysfs interface for thermal throttling, then userspace can get/update thermal limit Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10Kenneth Feng2023-02-141-0/+1
| | | | | | | | implement mode2 reset on smu_v13_0_10 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Add detailed GFXOFF stats to debugfsAndré Almeida2022-08-161-0/+3
| | | | | | | | | | | | | | | | | Add debugfs interface to log GFXOFF statistics: - Read amdgpu_gfxoff_count to get the total GFXOFF entry count at the time of query since system power-up - Write 1 to amdgpu_gfxoff_residency to start logging, and 0 to stop. Read it to get average GFXOFF residency % multiplied by 100 during the last logging interval. Both features are designed to be keep the values persistent between suspends. Signed-off-by: André Almeida <andrealmeid@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: introduce runtime pm modeGuchun Chen2022-07-181-0/+9
| | | | | | | | | | It can benefit code consistency in future. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/pm: implement the SMU_MSG_EnableGfxImu functionHuang Rui2022-06-031-0/+2
| | | | | | | | GC v11_0_1 asic needs to issue the EnableGfxImu message after start IMU. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: suppress compile warning about possible unaligned accessesEvan Quan2022-05-101-1/+4
| | | | | | | | | | | | | | | Suppress the following compile warning: In file included from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.c:39: >> drivers/gpu/drm/amd/amdgpu/../pm/inc/smu_v13_0_0_pptable.h:194:39: warning: field overdrive_table within 'struct smu_13_0_0_powerplay_table' is less aligned than 'struct smu_13_0_0_overdrive_table' and is usually due to 'struct smu_13_0_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/smu: add smu v13_0 header filesLikun Gao2022-05-041-0/+200
| | | | | | | | | Add driver_if ppsmc and pptable header files for smu v13_0_0 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: expand cg_flags from u32 to u64Evan Quan2022-04-081-1/+1
| | | | | | | | | With this, we can support more CG flags. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add send bad channel info functionStanley.Yang2022-03-151-0/+1
| | | | | | | | | support message SMU update bad channel info to update HBM bad channel info in OOB table Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: correct the default DriverSmuConfig table settingsEvan Quan2022-02-161-0/+14
| | | | | | | | | | | For Some ASICs, with the PMFW default settings, we may see the power consumption reported via metrics table is "Very Erratic". With the socket power alpha filter set as 10/100ms, we can correct that issue. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: add missing prototypes to amdgpu_dpm_internalMaíra Canal2022-02-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include the header with the prototype to silence the following clang warnings: drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:29:6: warning: no previous prototype for function 'amdgpu_dpm_get_active_displays' [-Wmissing-prototypes] void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev) ^ drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:29:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev) ^ static drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:76:5: warning: no previous prototype for function 'amdgpu_dpm_get_vrefresh' [-Wmissing-prototypes] u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) ^ drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.c:76:1: note: declare 'static' if the function is not intended to be used outside of this translation unit u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) ^ static 2 warnings generated. Besides that, remove the duplicated prototype of the function amdgpu_dpm_get_vblank_time in order to keep the consistency of the headers. Fixes: 6ddbd37f1074 ("drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations") Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Maíra Canal <maira.canal@usp.br> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu/pm: Implement new API function "emit" that accepts buffer base and ↵Darren Powell2022-02-021-0/+4
| | | | | | | | | | | | | | | | | | | | write offset (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - added API for new power management function emit_clk_levels This function should duplicate the functionality of print_clk_levels, but this solution passes the buffer base and write offset down the stack. - new powerplay function emit_clock_levels, implemented by smu_emit_ppclk_levels() This function parallels the implementation of smu_print_ppclk_levels and calls emit_clk_levels, and allows the returns of errors - new helper function smu_convert_to_smuclk called by smu_print_ppclk_levels and smu_emit_ppclk_levels Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-By: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/UAPI: add new CTX OP to get/set stable pstatesAlex Deucher2022-01-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Add a new CTX ioctl operation to set stable pstates for profiling. When creating traces for tools like RGP or using SPM or doing performance profiling, it's required to enable a special stable profiling power state on the GPU. These profiling states set fixed clocks and disable certain other power features like powergating which may impact the results. Historically, these profiling pstates were enabled via sysfs, but this adds an interface to enable it via the CTX ioctl from the application. Since the power state is global only one application can set it at a time, so if multiple applications try and use it only the first will get it, the ioctl will return -EBUSY for others. The sysfs interface will override whatever has been set by this interface. Mesa MR: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/207 v2: don't default r = 0; v3: rebase on Evan's PM cleanup Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Expose the FRU SMU I2C busLuben Tuikov2022-01-271-2/+12
| | | | | | | | | | | | | Expose both SMU I2C buses. Some boards use the same bus for both the RAS and FRU EEPROMs and others use different buses. This enables the additional I2C bus and sets the right buses to use for RAS and FRU EEPROM access. Cc: Roy Sun <Roy.Sun@amd.com> Co-developed-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: relocate the power related headersEvan Quan2022-01-1470-26896/+0
| | | | | | | | | | Instead of centralizing all headers in the same folder. Separate them into different folders and place them among those source files those who really need them. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: do not expose the smu_context structure used internally in powerEvan Quan2022-01-141-4/+0
| | | | | | | | | This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev->powerplay.pp_handle. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: drop redundant or unused APIs and data structuresEvan Quan2022-01-141-49/+0
| | | | | | | | Drop those unused APIs and data structures. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: move those code piece used by Stoney only to smu8_hwmgr.cEvan Quan2022-01-141-3/+0
| | | | | | | | Instead of putting them in amdgpu_dpm.c. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementationsEvan Quan2022-01-142-2/+32
| | | | | | | | | Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: move pp_force_state_enabled member to amdgpu_pm structureEvan Quan2022-01-141-0/+2
| | | | | | | | | As it lables an internal pm state and amdgpu_pm structure is the more proper place than amdgpu_device structure for it. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)Evan Quan2022-01-141-16/+1
| | | | | | | | | Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for them. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-26 18:30:42 +0000