summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/display/icl_dsi.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL2Jani Nikula2024-06-071-2/+4
* drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula2024-06-071-4/+8
* drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula2024-06-071-5/+7
* drm/i915: pass dev_priv explicitly to TRANS_VSYNCSHIFTJani Nikula2024-06-071-1/+2
* drm/i915: pass dev_priv explicitly to TRANS_VSYNCJani Nikula2024-06-071-1/+2
* drm/i915: pass dev_priv explicitly to TRANS_VBLANKJani Nikula2024-06-071-1/+2
* drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula2024-06-071-1/+1
* drm/i915: pass dev_priv explicitly to TRANS_HSYNCJani Nikula2024-06-071-1/+2
* drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula2024-06-071-1/+1
* drm/i915/dsi: Use enc_to_intel_dsi()Ville Syrjälä2024-03-151-2/+1
* drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostlyVille Syrjälä2024-03-071-1/+2
* Revert "drm/i915/dsi: Do display on sequence later on icl+"Ville Syrjälä2024-01-171-2/+1
* drm/i915: Skip some timing checks on BXT/GLK DSI transcodersVille Syrjälä2023-11-291-0/+7
* drm/i915/display: Store compressed bpp in U6.4 formatAnkit Nautiyal2023-11-141-5/+5
* drm/i915/dsi: let HW maintain CLK_POSTWilliam Tseng2023-09-201-12/+1
* drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform definesDnyaneshwar Bhadane2023-08-071-2/+3
* drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child deviceVille Syrjälä2023-07-061-3/+6
* drm/i915/dsi: Remove weird has_pch_encoder assertsVille Syrjälä2023-06-131-2/+0
* drm/i915/dsi: Grab the crtc from the customary placeVille Syrjälä2023-06-131-2/+2
* drm/i915/dsi: Move panel reset+power off to be the last thingVille Syrjälä2023-06-131-6/+8
* drm/i915/dsi: Respect power_off_delay on icl+Ville Syrjälä2023-06-131-0/+2
* drm/i915/dsi: Do DSC/scaler disable earlier on icl+Ville Syrjälä2023-06-131-4/+3
* drm/i915/dsi: Move most things from .disable() into .post_disable() on icl+Ville Syrjälä2023-06-131-9/+10
* drm/i915/dsi: Implement encoder->shutdown() for icl+Ville Syrjälä2023-06-131-0/+1
* drm/i915/dsi: Respect power cycle delay on icl+Ville Syrjälä2023-06-131-0/+6
* drm/i915/dsi: Gate DSI clocks earlierVille Syrjälä2023-06-131-3/+2
* drm/i915/dsi: Split icl+ D-PHY vs. DSI timing stepsVille Syrjälä2023-06-131-26/+42
* drm/i915/dsi: Do display on sequence later on icl+Ville Syrjälä2023-06-131-1/+2
* drm/i915/dsi: Do panel power on + reset deassert earlier on icl+Ville Syrjälä2023-06-131-4/+6
* drm/i915/display: Add new member to configure PCON color conversionAnkit Nautiyal2023-05-051-0/+1
* drm/i915/dsi: Use unconditional msleep() instead of intel_dsi_msleep()Hans de Goede2023-04-281-1/+1
* drm/i915/dsc: Fill in native_420 fieldSuraj Kandpal2023-04-031-2/+0
* drm/i915: s/PIPEMISC/PIPE_MISC/Ville Syrjälä2023-03-171-1/+1
* drm/i915/display: split out DSC and DSS registersJani Nikula2023-03-061-0/+1
* drm/i915/dsi: fix DSS CTL register offsets for TGL+Jani Nikula2023-03-061-3/+15
* drm/i915: Sprinkle some FIXMEs about TGL+ DSI transcoder timing messVille Syrjälä2023-02-201-1/+6
* drm/i915: Define transcoder timing register bitmasksVille Syrjälä2023-02-171-5/+5
* drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä2023-02-171-8/+8
* drm/i915: Give CPU transcoder timing registers TRANS_ prefixVille Syrjälä2023-02-171-6/+6
* drm/i915: Populate encoder->devdata for DSI on icl+Ville Syrjälä2023-02-081-1/+2
* drm/i915/display/dsi: use intel_de_rmw if possibleAndrzej Hajda2023-01-301-174/+82
* drm/i915/panel: move panel fixed EDID to struct intel_panelJani Nikula2023-01-261-1/+1
* drm/i915: Do panel VBT init early if the VBT declares an explicit panel typeVille Syrjälä2022-12-091-1/+1
* drm/i915: stop including i915_irq.h from i915_trace.hJani Nikula2022-11-111-0/+1
* drm/i915/display: remove drm_device aliasesAndrzej Hajda2022-10-111-5/+4
* drm/i915: Clean up connector->*_allowed setupVille Syrjälä2022-09-261-2/+0
* drm/i915: Extract intel_attach_scaling_mode_property()Ville Syrjälä2022-09-261-9/+1
* drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSCAnkit Nautiyal2022-09-071-0/+2
* drm/i915: move dpll under display.dpllJani Nikula2022-08-291-6/+6
* drm/i915/dsi: use VBT backlight and CABC port definitions directlyJani Nikula2022-08-181-4/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-27 00:51:01 +0000