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path: root/drivers/gpu/drm/i915/display/intel_cdclk.h
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: Use a plain old int for the cdclk/mdclk ratioVille Syrjälä2024-04-041-2/+2
* drm/i915: Use the correct mdclk/cdclk ratio in MBUS updatesVille Syrjälä2024-04-041-0/+1
* drm/i915/cdclk: Fix CDCLK programming order when pipes are activeVille Syrjälä2024-04-041-0/+3
* drm/i915: Use container_of_const() for statesVille Syrjälä2024-03-151-1/+3
* drm/i915/xe2lpd: Support MDCLK:CDCLK ratio changesGustavo Sousa2024-03-131-0/+3
* drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_stateGustavo Sousa2024-03-131-0/+2
* drm/i915/cdclk: Rename intel_cdclk_needs_modeset to intel_cdclk_clock_changedGustavo Sousa2024-02-281-1/+1
* drm/i915/debugfs: New debugfs for display clock frequenciesBhanuprakash Modem2023-04-141-0/+1
* drm/i915/display: add intel_display_limits.h for key enumsJani Nikula2023-01-251-1/+1
* drm/i915: move and group cdclk under display.cdclkJani Nikula2022-08-311-2/+2
* drm/i915: Fix DBUF bandwidth vs. cdclk handlingVille Syrjälä2022-03-211-0/+2
* drm/i915/cdclk: update intel_dump_cdclk_config() loggingJani Nikula2022-01-241-1/+2
* drm/i915/cdclk: turn around i915_drv.h and intel_cdclk.h dependencyJani Nikula2021-12-141-1/+5
* drm/i915/cdclk: hide struct intel_cdclk_valsJani Nikula2021-12-131-8/+0
* drm/i915/cdclk: move intel_atomic_check_cdclk() to intel_cdclk.cJani Nikula2021-12-131-1/+2
* drm/i915/display/dg2: Introduce CD clock squashing tableMika Kahola2021-12-071-0/+1
* drm/i915: add wrappers around cdclk vtable funcs.Dave Airlie2021-09-291-1/+3
* drm/i915: Nuke force_min_cdclk_changedVille Syrjälä2020-09-171-1/+0
* drm/i915: Pack struct intel_cdclk_valsVille Syrjälä2020-08-171-1/+1
* drm/i915: Read rawclk_freq earlierChris Wilson2020-02-191-1/+1
* drm/i915: Store active_pipes bitmask in cdclk stateVille Syrjälä2020-01-311-0/+3
* drm/i915: Convert cdclk to global stateVille Syrjälä2020-01-311-3/+42
* drm/i915: s/init_cdclk/init_cdclk_hw/Ville Syrjälä2020-01-311-2/+2
* drm/i915: Simplify intel_set_cdclk_{pre,post}_plane_update() calling conventionVille Syrjälä2020-01-311-10/+2
* drm/i915: s/cdclk_state/cdclk_config/Ville Syrjälä2020-01-311-9/+9
* drm/i915: Collect more cdclk state under the same roofVille Syrjälä2020-01-311-0/+1
* drm/i915: Extract intel_modeset_calc_cdclk()Ville Syrjälä2019-09-161-5/+1
* drm/i915: Use literal representation of cdclk tablesMatt Roper2019-09-101-0/+7
* drm/i915: move modesetting core code under display/Jani Nikula2019-06-171-0/+46
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 06:21:20 +0000