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path: root/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
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* drm/i915: Fix error code in icl_compute_combo_phy_dpll()Dan Carpenter2022-06-281-1/+1
* drm/i915/dpll: move shared dpll state verification to intel_dpll_mgr.cJani Nikula2022-06-171-0/+88
* drm/i915: Implement w/a 22010492432 for adl-sVille Syrjälä2022-06-161-2/+2
* drm/i915: Clean up DPLL related debugsVille Syrjälä2022-05-311-39/+9
* drm/i915: Split shared dpll .get_dplls() into compute and get phasesVille Syrjälä2022-05-311-66/+215
* drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock()Ville Syrjälä2022-04-251-15/+0
* drm/i915: Pass dev_priv to intel_shared_dpll_init()Ville Syrjälä2022-04-251-5/+4
* drm/i915: Make .get_dplls() return intVille Syrjälä2022-04-251-123/+121
* drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params()Ville Syrjälä2022-03-101-10/+13
* drm/i915: Replace bxt_clk_div with struct dpllVille Syrjälä2022-03-101-34/+16
* drm/i915: Store the m2 divider as a whole in bxt_clk_divVille Syrjälä2022-03-101-14/+13
* drm/i915: Clean up bxt/glk PLL registersVille Syrjälä2022-03-101-16/+16
* drm/i915: Use designated initializers for bxt_dp_clk_val[]Ville Syrjälä2022-03-041-7/+7
* drm/i915: Remove bxt m2_frac_enVille Syrjälä2022-03-041-10/+8
* drm/i915: Clean up some struct/array initializersVille Syrjälä2022-03-041-9/+9
* drm/i915: Move a bunch of stuff into rodata from the stackVille Syrjälä2022-03-041-12/+12
* drm/i915: Nuke skl_wrpll_context_init()Ville Syrjälä2022-03-041-10/+3
* drm/i915: Use str_on_off()Lucas De Marchi2022-03-021-2/+5
* drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza2022-02-181-13/+31
* drm/i915/dpll: make intel_shared_dpll_funcs internal to intel_dpll_mgr.cJani Nikula2022-01-191-0/+35
* drm/i915: Move TC PHY registers to their own headerMatt Roper2022-01-111-0/+1
* drm/i915/display: Rename POWER_DOMAIN_DPLL_DC_OFF to POWER_DOMAIN_DC_OFFJosé Roberto de Souza2021-10-201-3/+3
* drm/i915: Move PCH refclock stuff into its own fileVille Syrjälä2021-10-191-0/+1
* drm/i915/tc: Add/use helpers to retrieve TypeC port propertiesImre Deak2021-09-291-2/+3
* drm/i915: Nuke intel_prepare_shared_dpll()Ville Syrjälä2021-08-251-28/+0
* drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable()Ville Syrjälä2021-08-251-10/+3
* Merge tag 'drm-intel-next-2021-08-10-1' of git://anongit.freedesktop.org/drm/...Dave Airlie2021-08-121-494/+131
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| * drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabledImre Deak2021-08-031-1/+33
| * drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.cLucas De Marchi2021-07-301-492/+94
| * drm/i915/dg2: Skip shared DPLL handlingMatt Roper2021-07-221-1/+4
* | Merge branch 'topic/revid_steppings' into drm-intel-gt-nextMatt Roper2021-07-141-1/+1
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| * drm/i915/jsl_ehl: Use revid->stepping tablesMatt Roper2021-07-141-1/+1
* | drm/i915/adl_p: Add initial ADL_P WorkaroundsClint Taylor2021-06-151-2/+2
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* drm/i915/adl_p: Add PLL SupportAnusha Srivatsa2021-05-191-17/+52
* drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä2021-05-051-0/+1
* drm/i915/display: move crtc and dpll declarations where they belongJani Nikula2021-04-281-0/+1
* drm/i915/display: rename display version macrosLucas De Marchi2021-04-141-1/+1
* drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper2021-04-141-3/+3
* drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper2021-03-231-10/+10
* drm/i915/display: Fix a typoBhaskar Chowdhury2021-03-191-1/+1
* drm/i915: Use pipes instead crtc indices in PLL state trackingVille Syrjälä2021-03-081-23/+25
* drm/i915: Do intel_dpll_readout_hw_state() after encoder readoutVille Syrjälä2021-03-081-3/+6
* drm/i915/adl_s: Configure DPLL for ADL-SAditya Swarup2021-01-261-4/+34
* Merge tag 'drm-intel-next-queued-2020-11-27' of git://anongit.freedesktop.org...Dave Airlie2020-12-031-41/+70
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| * drm/i915: Use actual readout results for .get_freq()Ville Syrjälä2020-11-161-33/+45
| * drm/i915: Introduce intel_dpll_get_hw_state()Ville Syrjälä2020-11-161-3/+17
| * drm/i915/ehl: Implement W/A 22010492432Tejas Upadhyay2020-11-051-5/+8
* | drm: fix some kernel-doc markupsMauro Carvalho Chehab2020-11-161-1/+1
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* drm/i915/dg1: Enable DPLL for DG1Lucas De Marchi2020-10-151-4/+4
* drm/i915/dg1: Add and setup DPLLs for DG1Aditya Swarup2020-10-151-4/+38
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