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path:
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/
drivers
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gpu
/
drm
/
i915
/
intel_dpll_mgr.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
drm/i915: switch intel_wait_for_register to uncore
Daniele Ceraolo Spurio
2019-03-26
1
-12
/
+13
*
drm/i915/ehl: Add dpll mgr
Lucas De Marchi
2019-03-22
1
-1
/
+15
*
drm/i915: Remove the fragile array index -> link rate mapping
Ville Syrjälä
2019-03-19
1
-68
/
+68
*
drm/i915: Nuke icl_calc_dp_combo_pll_link()
Ville Syrjälä
2019-03-19
1
-70
/
+0
*
drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll()
Ville Syrjälä
2019-03-19
1
-18
/
+17
*
drm/i915: Pass crtc_state down to icl dpll funcs
Ville Syrjälä
2019-03-19
1
-4
/
+8
*
drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll()
Ville Syrjälä
2019-03-19
1
-8
/
+7
*
drm/i915: Pass crtc_state down to cnl dpll funcs
Ville Syrjälä
2019-03-19
1
-17
/
+12
*
drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll()
Ville Syrjälä
2019-03-19
1
-16
/
+10
*
drm/i915: Pass crtc_state down to bxt dpll funcs
Ville Syrjälä
2019-03-19
1
-23
/
+25
*
drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll()
Ville Syrjälä
2019-03-19
1
-8
/
+7
*
drm/i915: Pass crtc_state down to skl dpll funcs
Ville Syrjälä
2019-03-19
1
-10
/
+7
*
drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll()
Ville Syrjälä
2019-03-19
1
-29
/
+27
*
drm/i915: Don't pass crtc to intel_find_shared_dpll()
Ville Syrjälä
2019-03-19
1
-9
/
+9
*
drm/i915/icl: remove intel_dpll_is_combophy()
Lucas De Marchi
2019-03-15
1
-5
/
+0
*
drm/i915/icl: split combo and tbt pll funcs
Lucas De Marchi
2019-03-15
1
-20
/
+54
*
drm/i915/icl: split combo and mg pll disable
Lucas De Marchi
2019-03-15
1
-7
/
+23
*
drm/i915/icl: split pll enable in three steps
Lucas De Marchi
2019-03-15
1
-19
/
+37
*
drm/i915/icl: split combo and mg pll enable
Lucas De Marchi
2019-03-15
1
-4
/
+21
*
drm/i915/gen11+: First assume next platforms will inherit stuff
Rodrigo Vivi
2019-03-13
1
-1
/
+1
*
drm/i915/icl: move MG pll hw_state readout
Lucas De Marchi
2019-03-01
1
-48
/
+74
*
drm/i915: Pick the first unused PLL once again
Ville Syrjälä
2019-01-31
1
-1
/
+2
*
drm/i915/icl: keep track of unused pll while looping
Lucas De Marchi
2019-01-29
1
-10
/
+9
*
drm/i915/icl: use tc_port in MG_PLL macros
Lucas De Marchi
2019-01-29
1
-40
/
+39
*
drm/i915/dpll_mgr: switch to kernel types
Jani Nikula
2019-01-17
1
-72
/
+73
*
drm/i915: Markup paired operations on display power domains
Chris Wilson
2019-01-14
1
-21
/
+45
*
drm/i915/icl: Calculate DPLL params for DSI
Madhav Chauhan
2018-12-03
1
-1
/
+2
*
drm/i915/icl: Fix crash when getting DPLL of a MST encoder in TC ports
José Roberto de Souza
2018-10-31
1
-2
/
+10
*
drm/i915/icl: Refactor icl pll functions
Vandita Kulkarni
2018-10-16
1
-37
/
+17
*
drm/i915/icl: Use helper functions to classify the ports
Vandita Kulkarni
2018-10-16
1
-10
/
+4
*
drm/i915/icl: Refactor get_ddi_pll using helper func
Vandita Kulkarni
2018-10-16
1
-1
/
+1
*
drm/i915: Fixup kernel doc for param name changes
Chris Wilson
2018-10-08
1
-3
/
+3
*
drm/i915: Make shared dpll functions take crtc_state, v3.
Maarten Lankhorst
2018-10-05
1
-18
/
+11
*
drm/i915: Fix ICL+ HDMI clock readout
Ville Syrjälä
2018-09-04
1
-8
/
+15
*
drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separa...
Manasi Navare
2018-08-20
1
-6
/
+7
*
drm/i915/icl: Add TBT checks for PLL calculations
Anusha Srivatsa
2018-07-27
1
-1
/
+3
*
Merge drm/drm-next into drm-intel-next-queued
Rodrigo Vivi
2018-07-23
1
-3
/
+3
|
\
|
*
Merge tag 'drm-intel-next-2018-07-09' of git://anongit.freedesktop.org/drm/dr...
Dave Airlie
2018-07-19
1
-24
/
+85
|
|
\
|
*
|
drm/i915: Use drm_plane_mask() & co.
Ville Syrjälä
2018-07-02
1
-3
/
+3
*
|
|
drm/i915/icl: compute the TBT PLL registers
Paulo Zanoni
2018-07-19
1
-1
/
+21
|
|
/
|
/
|
*
|
drm/i915: Mark expected switch fall-throughs
Gustavo A. R. Silva
2018-07-05
1
-0
/
+3
*
|
drm/i915/icl: Do read-modify-write as needed during MG PLL programming
Imre Deak
2018-06-21
1
-4
/
+35
*
|
drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz
Imre Deak
2018-06-21
1
-20
/
+47
|
/
*
drm/i915/icl: start adding the TBT pll
Paulo Zanoni
2018-06-14
1
-4
/
+16
*
drm/i915/icl: Get DDI clock for ICL based on PLLs.
Manasi Navare
2018-06-01
1
-0
/
+70
*
drm/i915/icl: compute the MG PLL registers
Paulo Zanoni
2018-05-07
1
-1
/
+222
*
drm/i915/icl: compute the combo PHY (DPLL) DP registers
Paulo Zanoni
2018-05-07
1
-1
/
+86
*
drm/i915/icl: compute the combo PHY (DPLL) HDMI registers
Paulo Zanoni
2018-05-07
1
-3
/
+36
*
drm/i915/icl: add basic support for the ICL clocks
Paulo Zanoni
2018-05-07
1
-1
/
+312
*
drm/i915: reorder dpll_info members
Lucas De Marchi
2018-03-27
1
-24
/
+24
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