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path: root/drivers/gpu/drm/msm/dsi/pll
Commit message (Expand)AuthorAgeFilesLines
* drm/msm/dsi/pll: call vco set rate explicitlyHarigovindan P2020-02-131-0/+6
* clk: mux: Add support for specifying parents via DT/pointersStephen Boyd2020-01-062-4/+4
* drm/msm: drop use of drmP.hSam Ravnborg2019-09-031-1/+1
* Merge tag 'drm-msm-next-2019-06-25' of https://gitlab.freedesktop.org/drm/msm...Dave Airlie2019-06-281-33/+73
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| * drm/msm/dsi_pll_10nm: Remove impossible checkSean Paul2019-06-201-3/+0
| * drm/msm/dsi_pll_10nm: Release clk hw on destroy and failureSean Paul2019-06-201-30/+73
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner2019-06-055-45/+5
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* Merge tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2018-12-255-28/+28
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| * drm/msm/dsi: fix dsi clock names in DSI 10nm PLL driverAbhinav Kumar2018-12-111-4/+4
| * drm: msm: Use DRM_DEV_* instead of dev_*Mamta Shukla2018-12-115-24/+24
* | drm/msm/dsi: configure VCO rate for 10nm PLL driverAbhinav Kumar2018-11-301-1/+3
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* drm/msm/dsi: initialize postdiv_lock before use for 10nm pllRajesh Yadav2018-07-261-0/+2
* drm/msm/dsi: Populate PLL 10nm clock opsArchit Taneja2018-02-201-8/+654
* drm/msm/dsi: Add skeleton 10nm PHY/PLL codeArchit Taneja2018-02-203-0/+188
* drm/msm/dsi: check for failure on retrieving pll in dsi managerLloyd Atkinson2018-02-201-1/+1
* clk: divider: fix incorrect usage of container_ofJerome Brunet2017-12-281-1/+1
* drm/msm/dsi: Add PHY/PLL for 8x96Archit Taneja2017-02-063-0/+1127
* drm/msm: Set CLK_IGNORE_UNUSED flag for PLL clocksArchit Taneja2016-11-022-0/+2
* drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()Luis Henriques2016-03-031-2/+2
* drm/msm/dsi: Add DSI PLL for 28nm 8960 PHYArchit Taneja2015-12-143-0/+546
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2015-09-043-36/+46
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| * drm/msm/dsi: Make each PHY type compilation independentHai Li2015-08-151-0/+8
| * drm/msm/dsi: Save/Restore PLL status across PHY resetHai Li2015-08-153-36/+38
* | drm/msm/dsi: Convert to clk_hw based provider APIsStephen Boyd2015-08-241-2/+2
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* drm/msm/dsi: Add DSI PLL clock driver supportHai Li2015-06-113-0/+905