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path: root/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
Commit message (Expand)AuthorAgeFilesLines
* drm/nouveau/disp: merge head/outp/ior code into chipset filesBen Skeggs2022-07-271-208/+0
* drm/nouveau/disp/dp: explicitly control scrambling when setting patternBen Skeggs2021-12-161-1/+13
* drm/nouveau/disp/hda/gf119-: add HAL for programming device entry in SFBen Skeggs2020-05-221-0/+1
* drm/nouveau/disp: keep track of high-speed state, program into clockIlia Mirkin2018-10-111-4/+7
* drm/nouveau/disp/nv50-: fetch mask of available sors during oneinitBen Skeggs2018-05-181-10/+9
* drm/nouveau/disp/gf119: add missing drive vfunc ptrRob Clark2018-01-091-0/+1
* drm/nouveau/disp/nv50-: avoid creating ORs that aren't present on HWBen Skeggs2017-06-171-1/+10
* drm/nouveau/disp/nv50-: implement a common supervisor 2.2Ben Skeggs2017-06-161-0/+33
* drm/nouveau/disp: remove hw-specific customisation of output pathsBen Skeggs2017-06-161-12/+0
* drm/nouveau/disp/gf119-: port OR DP VCPI control to nvkm_iorBen Skeggs2017-06-161-4/+4
* drm/nouveau/disp/gt215-: port HDA ELD controls to nvkm_iorBen Skeggs2017-06-161-0/+21
* drm/nouveau/disp/g94-: port OR DP drive setting control to nvkm_iorBen Skeggs2017-06-161-41/+11
* drm/nouveau/disp/g94-: port OR DP training pattern control to nvkm_iorBen Skeggs2017-06-161-6/+5
* drm/nouveau/disp/g94-: port OR DP link power control to nvkm_iorBen Skeggs2017-06-161-1/+1
* drm/nouveau/disp/g94-: port OR DP link setup to nvkm_iorBen Skeggs2017-06-161-9/+9
* drm/nouveau/disp/g94-: port OR DP lane mapping to nvkm_iorBen Skeggs2017-06-161-0/+3
* drm/nouveau/disp/g84-: port OR HDMI control to nvkm_iorBen Skeggs2017-06-161-0/+3
* drm/nouveau/disp/nv50-: port OR power state control to nvkm_iorBen Skeggs2017-06-161-0/+1
* drm/nouveau/disp/nv50-: fetch head/OR state at beginning of supervisorBen Skeggs2017-06-161-0/+24
* drm/nouveau/disp: introduce input/output resource abstractionBen Skeggs2017-06-161-0/+11
* drm/nouveau/disp: shuffle functions aroundBen Skeggs2017-06-161-37/+36
* drm/nouveau/disp/sor/gf119-: add method to program mst payload informationBen Skeggs2016-11-071-0/+12
* drm/nouveau/disp/sor/gf119-: add method to control mst enableBen Skeggs2016-11-071-1/+3
* drm/nouveau/disp/sor/gf119: select correct sor when poking training patternBen Skeggs2016-07-061-1/+2
* drm/nouveau/disp/sor/gm107: training pattern registers are like gm200Ben Skeggs2016-06-071-1/+1
* drm/nouveau/disp/sor/gf119: both links use the same training registerBen Skeggs2016-06-071-2/+1
* drm/nouveau/disp: split user classes out from engine implementationsBen Skeggs2015-08-281-0/+117
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