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path: root/drivers/irqchip/irq-omap-intc.c
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* irqchip: Remove asmlinkage for handlers registered with set_handle_irq()Jinjie Ruan2024-07-301-2/+1
| | | | | | | | | | | | | | | | All architectures with use set_handle_irq() to set the root chip interrupt handler call that handler from C code, so there's no need for these handlers to be marked asmlinkage. Remove asmlinkage for all handlers registered with set_handle_irq(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/all/20240729112606.1581732-1-ruanjinjie@huawei.com
* irq: remove handle_domain_{irq,nmi}()Mark Rutland2021-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now that entry code handles IRQ entry (including setting the IRQ regs) before calling irqchip code, irqchip code can safely call generic_handle_domain_irq(), and there's no functional reason for it to call handle_domain_irq(). Let's cement this split of responsibility and remove handle_domain_irq() entirely, updating irqchip drivers to call generic_handle_domain_irq(). For consistency, handle_domain_nmi() is similarly removed and replaced with a generic_handle_domain_nmi() function which also does not perform any entry logic. Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire when they were called in an inappropriate context. So that we can identify similar issues going forward, similar WARN_ON_ONCE() logic is added to the generic_handle_*() functions, and comments are updated for clarity and consistency. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de>
* irqchip/irq-omap-intc: Do not statically initialize variablesLadislav Michl2017-10-161-2/+2
| | | | | | | | | | | | | | | omap_nr_pending and omap_nr_irqs variables are initialized right at the beginning of intc_of_init function, so there's no need to statically initialize them. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Cc: Jason Cooper <jason@lakedaemon.net> Link: https://lkml.kernel.org/r/20171016161303.veumgcd3xom5c54r@lenoch
* irqchip/irq-omap-intc: Remove omap3_init_irq()Ladislav Michl2017-10-161-12/+0
| | | | | | | | | | | | | | All mach-omap2 variants are device tree only now, so this function is dead code. Remove it. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-omap@vger.kernel.org Cc: Jason Cooper <jason@lakedaemon.net> Link: https://lkml.kernel.org/r/20171016160422.uu2i7vvrgy7cc4aw@lenoch
* irqchip/omap-intc: Fix missing <linux/irqchip/irq-omap-intc.h> includeBen Dooks2016-06-131-0/+2
| | | | | | | | | | | | | | | | | Fix the missing include of <linux/irqchip/irq-omap-intc.h> which declares all the missing functions from the following warnings: drivers/irqchip/irq-omap-intc.c:84:6: warning: symbol 'omap_intc_save_context' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:105:6: warning: symbol 'omap_intc_restore_context' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:124:6: warning: symbol 'omap3_intc_prepare_idle' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:134:6: warning: symbol 'omap3_intc_resume_idle' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:173:5: warning: symbol 'omap_irq_pending' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:183:6: warning: symbol 'omap3_intc_suspend' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:365:13: warning: symbol 'omap3_init_irq' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465407872-10299-1-git-send-email-ben.dooks@codethink.co.uk Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip/omap-intc: Add support for spurious irq handlingSekhar Nori2016-01-061-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Under some conditions, irq sorting procedure used by INTC can go wrong resulting in a spurious irq getting reported. If this condition is not handled, it results in endless stream of: unexpected IRQ trap at vector 00 messages from ack_bad_irq() Handle the spurious interrupt condition in omap-intc driver to prevent this. Measurements using kernel function profiler on AM335x EVM running at 720MHz show that after this patch omap_intc_handle_irq() takes about 37.4us against 34us before this patch. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Cc: John Ogness <john.ogness@linutronix.de> Cc: Felipe Balbi <balbi@ti.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/9c78a6db02ac55f7af7371b417b6e414d2c3095b.1450188128.git.nsekhar@ti.com Cc: stable@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip/omap-intc: Remove duplicate setup for IRQ chip type handlerMilo Kim2015-12-291-1/+0
| | | | | | | | | | | | | | | | | | Some OMAP interrupt controllers use generic level detection, so handle_level_irq() is used as the chip type handler. Allocated IRQ chip type handler doesn't need to set it again because irq_alloc_domain_generic_chips() has already registered it. Tested with BeagleBoneBlack Rev C. Signed-off-by: Milo Kim <milo.kim@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-omap@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/1450687994-12580-1-git-send-email-milo.kim@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: omap-intc: Improve IRQ handlerFelipe Balbi2015-07-221-30/+5
| | | | | | | | | | | | | | | | | | | | | | As it turns out the current IRQ number will *always* be available from SIR register which renders the reads of PENDING registers as plain unnecessary overhead. In order to catch any situation where SIR reads as zero, we're adding a WARN() to turn it into a very verbose error and users actually report it. With this patch average running time of omap_intc_handle_irq() reduced from about 28.5us to 19.8us as measured by the kernel function profiler. Tested with BeagleBoneBlack Rev A5C. Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Cc: Linux ARM Kernel Mailing List <linux-arm-kernel@lists.infradead.org> Link: http://lkml.kernel.org/r/20150720204910.GH5394@saruman.tx.rr.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: Prepare for local stub header removalJoel Porquet2015-07-111-2/+1
| | | | | | | | | | | | | | | | | The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: omap-intc: Remove unused legacy interface for omap2Tony Lindgren2015-01-261-8/+0
| | | | | | | | | | | Nowadays omap2 is booting in device tree only mode so there is no need to keep the legacy interface around for omap2_init_irq(). Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1421187806-6804-3-git-send-email-tony@atomide.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: omap-intc: Fix support for dm814 and dm816Tony Lindgren2015-01-261-9/+5
| | | | | | | | | | | | | | | | On dm81xx we have 128 interrupts like am33xx has. Let's add compatible flags for dm814x and dm816x, and document the existing binding. As the dm81xx are booting in device tree only mode, we can now also remove ti81xx_init_irq() legacy function. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1421187806-6804-2-git-send-email-tony@atomide.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: omap-intc: Fix legacy DMA regressionFelipe Balbi2015-01-071-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | commit 55601c9f2467 (arm: omap: intc: switch over to linear irq domain) introduced a regression with SDMA legacy driver because that driver strictly depends on INTC's IRQs starting at NR_IRQs. Aparently irq_domain_add_linear() won't guarantee that, since we see a 7 IRQs difference when booting with and without the commit cited above. Until arch/arm/plat-omap/dma.c is properly fixed, we must maintain OMAP2/3 using irq_domain_add_legacy(). A FIXME note was added so people know to delete that code once that legacy DMA driver is fixed up. Fixes: 55601c9f2467 (arm: omap: intc: switch over to linear irq domain) Cc: <stable@vger.kernel.org> # v3.18 Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Link: https://lkml.kernel.org/r/1420576688-10604-1-git-send-email-balbi@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge branch 'irq-core-for-linus' of ↵Linus Torvalds2014-10-091-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "The irq departement delivers: - a cleanup series to get rid of mindlessly copied code. - another bunch of new pointlessly different interrupt chip drivers. Adding homebrewn irq chips (and timers) to SoCs must provide a value add which is beyond the imagination of mere mortals. - the usual SoC irq controller updates, IOW my second cat herding project" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits) irqchip: gic-v3: Implement CPU PM notifier irqchip: gic-v3: Refactor gic_enable_redist to support both enabling and disabling irqchip: renesas-intc-irqpin: Add minimal runtime PM support irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev irqchip: atmel-aic5: Add sama5d4 support irqchip: atmel-aic5: The sama5d3 has 48 IRQs Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 binding irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller irqchip: renesas-irqc: Add binding docs for new R-Car Gen2 SoCs irqchip: renesas-irqc: Add DT binding documentation irqchip: renesas-intc-irqpin: Document SoC-specific bindings openrisc: Get rid of handle_IRQ arm64: Get rid of handle_IRQ ARM: omap2: irq: Convert to handle_domain_irq ARM: imx: tzic: Convert to handle_domain_irq ARM: imx: avic: Convert to handle_domain_irq irqchip: or1k-pic: Convert to handle_domain_irq irqchip: atmel-aic5: Convert to handle_domain_irq irqchip: atmel-aic: Convert to handle_domain_irq irqchip: gic-v3: Convert to handle_domain_irq ...
* irqchip: omap-intc: remove unnecessary commentsFelipe Balbi2014-09-161-9/+0
| | | | | | | | no fuctional changes. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: correct maximum number or MIR registersFelipe Balbi2014-09-161-1/+1
| | | | | | | | | maximum number of MIR register is 4, rather than 3. Fix that. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: enable TURBO idle modeFelipe Balbi2014-09-161-0/+5
| | | | | | | | | | | | | | When TURBO bit is set in the INTC_IDLE register, the input synchronizer clock will be autogated based on activity on the INTC. Because this idle mode increases the interrupt latency by 2 clock cycles, we're only enabling it during suspend. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: enable IP protectionFelipe Balbi2014-09-161-2/+20
| | | | | | | | | | When PROTECTION bit in enabled in PROTECTION register, INTC's registers are only accessible from privileged mode. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: remove unnecesary of_address_to_resource() callFelipe Balbi2014-09-161-6/+0
| | | | | | | | | | | of_iomap(), which is called from omap_init_irq_of(), already takes care of making sure we have a valid resource to deal with. Because of that, we can safely remove our explicit call to of_address_to_resource(). Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: comment style cleanupFelipe Balbi2014-09-161-2/+4
| | | | | | | | | no functional changes, just making sure comment follows Coding Style. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* irqchip: omap-intc: minor improvement to omap_irq_pending()Felipe Balbi2014-09-161-4/+3
| | | | | | | | | We already hold the number of Pending registers in omap_nr_pending. Let's use that instead. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* arm: omap: irq: move irq.c to drivers/irqchip/Felipe Balbi2014-09-161-0/+394
Just move the code over as it has no dependencies on arch/arm/ anymore. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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