linux.git - Linux kernel mainline tree

	Commit message (Expand)	Author	Age	Files	Lines
*	riscv: prefix IRQ_ macro names with an RV_ namespace	Paul Walmsley	2020-01-04	1	-1/+1
*	riscv: abstract out CSR names for supervisor vs machine mode	Christoph Hellwig	2019-11-05	1	-4/+7
*	Merge tag 'irqchip-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/...	Thomas Gleixner	2019-10-25	1	-2/+2
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\| *	irqchip/sifive-plic: Skip contexts except supervisor in plic_init()	Alan Mikhak	2019-10-25	1	-2/+2
* \|	Merge tag 'irqchip-fixes-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/...	Thomas Gleixner	2019-10-14	1	-14/+15
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\| *	irqchip/sifive-plic: Switch to fasteoi flow	Marc Zyngier	2019-09-18	1	-14/+15
* \|	irqchip/sifive-plic: set max threshold for ignored handlers	Christoph Hellwig	2019-09-05	1	-2/+10
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*	irqchip/sifive-plic: Implement irq_set_affinity() for SMP host	Anup Patel	2019-02-21	1	-6/+39
*	irqchip/sifive-plic: Differentiate between PLIC handler and context	Anup Patel	2019-02-21	1	-8/+8
*	irqchip/sifive-plic: Add warning in plic_init() if handler already present	Anup Patel	2019-02-21	1	-0/+5
*	irqchip/sifive-plic: Pre-compute context hart base and enable base	Anup Patel	2019-02-21	1	-26/+21
*	irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid.	Atish Patra	2019-02-14	1	-0/+5
*	RISC-V: Use Linux logical CPU number instead of hartid	Atish Patra	2018-10-22	1	-3/+5
*	RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid	Palmer Dabbelt	2018-10-22	1	-1/+1
*	irqchip: add a SiFive PLIC driver	Christoph Hellwig	2018-08-13	1	-0/+260