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path: root/drivers/pci/controller/dwc/pcie-designware.c
Commit message (Expand)AuthorAgeFilesLines
* PCI: dwc: Add Root Port and Endpoint controller eDMA engine supportSerge Semin2023-02-221-0/+195
* PCI: dwc: Introduce generic platform clocks and resetsSerge Semin2022-11-231-0/+91
* PCI: dwc: Combine iATU detection proceduresSerge Semin2022-11-231-29/+10
* PCI: dwc: Introduce generic resources getterSerge Semin2022-11-231-20/+55
* PCI: dwc: Introduce generic controller capabilities interfaceSerge Semin2022-11-231-5/+6
* PCI: dwc: Introduce dma-ranges property support for RC-hostSerge Semin2022-11-231-2/+54
* PCI: dwc: Use dev_info for PCIe link down event loggingVidya Sagar2022-11-101-1/+1
* PCI: dwc: Fix n_fts[] array overrunVidya Sagar2022-10-271-1/+1
* PCI: dwc: Validate iATU outbound mappings against hardware constraintsSerge Semin2022-08-011-13/+25
* PCI: dwc: Add iATU regions size detection procedureSerge Semin2022-08-011-4/+29
* PCI: dwc: Simplify in/outbound iATU setup methodsSerge Semin2022-08-011-205/+85
* PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OBSerge Semin2022-08-011-21/+7
* PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IOSerge Semin2022-08-011-30/+5
* PCI: dwc: Add macros to compare Synopsys IP core versionsSerge Semin2022-08-011-4/+4
* PCI: dwc: Read DWC IP core version from registerSerge Semin2022-08-011-0/+24
* PCI: dwc: Use native DWC IP core version representationSerge Semin2022-08-011-4/+4
* PCI: dwc: Log link speed and width if it comes upSerge Semin2022-08-011-6/+16
* PCI: dwc: Organize local variable usageSerge Semin2022-07-051-5/+3
* PCI: dwc: Convert dw_pcie_link_up() to use dw_pcie_readl_dbi()Serge Semin2022-07-051-1/+1
* PCI: dwc: Simplify unrolled iATU detectionSerge Semin2022-07-051-6/+5
* PCI: dwc: Add newlines to log messagesSerge Semin2022-07-051-1/+1
* PCI: dwc: Add braces to multi-line if-else statementsSerge Semin2022-07-051-1/+2
* PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" existsSerge Semin2022-07-051-7/+7
* PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit addressSerge Semin2022-07-051-6/+10
* PCI: dwc: Add unroll iATU space support to dw_pcie_disable_atu()Serge Semin2022-07-051-3/+13
* PCI: dwc: Do not remap invalid resTim Harvey2021-12-021-3/+4
* PCI: dwc: Export more symbols to allow modular driversLuca Ceresoli2021-09-301-0/+1
* PCI: dwc: Move iATU detection earlierHou Zhiqiang2021-04-291-3/+8
* PCI: dwc: Don't assume the ops in dw_pcie always existJisheng Zhang2021-02-241-7/+7
* PCI: dwc: Add upper limit address for outbound iATUShradha Todi2021-02-241-0/+5
* PCI: dwc: Change size to u64 for EP outbound iATUShradha Todi2021-02-241-1/+1
* PCI: dwc: Work around ECRC configuration issueVidya Sagar2021-02-241-2/+47
* PCI: dwc: Detect number of iATU windowsRob Herring2020-11-191-7/+86
* PCI: dwc: Add support to program ATU for >4GB memoryVidya Sagar2020-11-181-5/+7
* PCI: dwc: Add common iATU register supportKunihiko Hayashi2020-10-131-0/+5
* PCI: dwc: Fix 'cast truncates bits from constant value'Gustavo Pimentel2020-09-281-1/+1
* PCI: designware-ep: Add multiple PFs support for DWCXiaowei Bao2020-09-211-18/+41
* PCI: dwc: Move N_FTS setup to common setupRob Herring2020-09-101-11/+17
* PCI: dwc: Set PORT_LINK_DLL_LINK_EN in common setup codeRob Herring2020-09-101-0/+1
* PCI: dwc: Centralize link gen settingRob Herring2020-09-101-14/+19
* PCI: dwc: Make ATU accessors privateRob Herring2020-09-081-6/+6
* PCI: dwc: Remove read_dbi2 codeRob Herring2020-09-081-15/+0
* PCI: dwc: Ensure FAST_LINK_MODE is clearedRob Herring2020-09-081-1/+4
* PCI: dwc: Add a 'num_lanes' field to struct dw_pcieRob Herring2020-09-081-8/+6
* PCI: Replace http:// links with https://Alexander A. Klimov2020-06-301-1/+1
* PCI: dwc: Program outbound ATU upper limit registerAlan Mikhak2020-05-221-2/+5
* PCI: dwc: intel: PCIe RC controller driverDilip Kota2020-01-091-0/+56
* Merge branch 'lorenzo/pci/tegra'Bjorn Helgaas2019-09-231-1/+89
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| * PCI: tegra: Add Tegra194 PCIe supportVidya Sagar2019-09-081-1/+1
| * PCI: dwc: Add support to enable CDM register checkVidya Sagar2019-08-131-0/+7
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