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* phy: add driver for MediaTek XFI T-PHYDaniel Golle2024-04-123-0/+463
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for MediaTek's XFI T-PHY which can be found in the MT7988 SoC. The XFI T-PHY is a 10 Gigabit/s Ethernet SerDes PHY with muxes on the internal side to be used with either USXGMII PCS or LynxI PCS, depending on the selected PHY interface mode. The PHY can operates only in PHY_MODE_ETHERNET, the submode is one of PHY_INTERFACE_MODE_* corresponding to the supported modes: * USXGMII \ * 10GBase-R }- USXGMII PCS - XGDM \ * 5GBase-R / \ }- Ethernet MAC * 2500Base-X \ / * 1000Base-X }- LynxI PCS - GDM / * Cisco SGMII (MAC side) / I chose the name XFI T-PHY because names of functions dealing with the phy in the vendor driver are prefixed "xfi_pextp_". The register space used by the phy is called "pextp" in the vendor sources, which could be read as "_P_CI _ex_press _T_-_P_hy", and that is quite misleading as this phy isn't used for anything related to PCIe, so I wanted to find a better name. XFI is still somehow related (as in: you would find the relevant places using grep in the vendor driver when looking for that) and the term seemed to at least somehow be aligned with the function of that phy: Dealing with (up to) 10 Gbit/s Ethernet serialized differential signals. In order to work-around a performance issue present on the first of two XFI T-PHYs found in MT7988, special tuning is applied which can be selected by adding the 'mediatek,usxgmii-performance-errata' property to the device tree node, similar to how the vendor driver is doing that too. There is no documentation for most registers used for the analog/tuning part, however, most of the registers have been partially reverse-engineered from MediaTek's SDK implementation (see links, an opaque sequence of 32-bit register writes) and descriptions for all relevant digital registers and bits such as resets and muxes have been supplied by MediaTek. Link: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/b72d6cba92bf9e29fb035c03052fa1e86664a25b/21.02/files/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c Link: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/dec96a1d9b82cdcda4a56453fd0b453d4cab4b85/21.02/files/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://lore.kernel.org/r/8719c82634df7e8e984f1a608be3ba2f2d494fb4.1712625857.git.daniel@makrotopia.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: constify of_phandle_args in xlateKrzysztof Kozlowski2024-02-233-3/+3
| | | | | | | | | | | | | The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mtk-mipi-csi: add driver for CSI phyPhi-bang Nguyen2024-02-074-0/+370
| | | | | | | | | | | | | | | | | | | | | This is a new driver that supports the MIPI CSI CD-PHY version 0.5 The number of PHYs depend on the SoC. Each PHY can support D-PHY only or CD-PHY configuration. The driver supports only D-PHY mode, so CD-PHY compatible PHY are configured in D-PHY mode. [Julien Stephan: simplify driver model: one instance per phy vs one instance for all phys] Signed-off-by: Louis Kuo <louis.kuo@mediatek.com> Signed-off-by: Phi-bang Nguyen <pnguyen@baylibre.com> [Julien Stephan: refactor code] Co-developed-by: Julien Stephan <jstephan@baylibre.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240111101738.468916-1-jstephan@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'phy-for-6.8' of ↵Linus Torvalds2024-01-181-0/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "New Support: - Qualcomm SM8650 UFS, PCIe and USB/DP Combo PHY, eUSB2 PHY, SDX75 USB3, X1E80100 USB3 support - Mediatek MT8195 support - Rockchip RK3128 usb2 support - TI SGMII mode for J784S4 Updates: - Qualcomm v7 register offsets updates - Mediatek tphy support for force phy mode switch" * tag 'phy-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (34 commits) phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J784S4 phy: ti: gmii-sel: Enable SGMII mode for J784S4 phy: qcom-qmp-usb: Add Qualcomm X1E80100 USB3 PHY support dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add X1E80100 USB PHY binding phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document X1E80100 compatible dt-bindings: phy: qcom: snps-eusb2: Document the X1E80100 compatible phy: mediatek: tphy: add support force phy mode switch dt-bindings: phy: mediatek: tphy: add a property for force-mode switch phy: phy-can-transceiver: insert space after include phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: fix path to header phy: renesas: phy-rcar-gen2: use select for GENERIC_PHY phy: qcom-qmp: qserdes-txrx: Add v7 register offsets phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets phy: qcom-qmp: qserdes-com: Add v7 register offsets phy: qcom-qmp: pcs-usb: Add v7 register offsets phy: qcom-qmp: pcs: Add v7 register offsets phy: qcom-qmp: qserdes-txrx: Add some more v6.20 register offsets phy: qcom-qmp: qserdes-com: Add some more v6 register offsets ...
| * phy: mediatek: tphy: add support force phy mode switchChunfeng Yun2023-12-211-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this is used to be compatible with old SoCs, such as mt8195, which shares t-phy between usb3 and pcie controller, usually, it's default mode is pcie rc mode, and could use force mode to switch into usb3 mode, because pericfg layer doesn't provide mode switch, also no efuse or jumper can be used; Currently, only support switch from default pcie mode to usb3; Note: don't use this way on new SoCs, use pericfg layer's mode switch instead (by perperty "mediatek,syscon-type"). Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20231211025624.28991-2-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: mediatek: mipi: mt8183: fix minimal supported frequencyMichael Walle2023-11-271-1/+1
|/ | | | | | | | | | | | | The lowest supported clock frequency of the PHY is 125MHz (see also mtk_mipi_tx_pll_enable()), but the clamping in .round_rate() has the wrong minimal value, which will make the .enable() op return -EINVAL on low frequencies. Fix the minimal clamping value. Fixes: efda51a58b4a ("drm/mediatek: add mipi_tx driver for mt8183") Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20231123110202.2025585-1-mwalle@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'phy-for-6.6' of ↵Linus Torvalds2023-09-036-25/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "As usual a couple of new drivers, a bunch of new device support and few updates to existing drivers New Support: - Starfive dphy rx, JH7110 usb and pcie support - Rockchip rv1126 inno-dsi phy, rk3588 usb and pcie support - Qualcomm sa8775p PCIe support, M31 USB PHY driver - Samsung Exynos850 usb support Updates: - Mediatek dsi driver clock updates - Qualcomm sm8150 combo phy with reworking of qmp pcie driver - Xilinx zynqmp runtime PM support" * tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (83 commits) phy: exynos5-usbdrd: Add Exynos850 support phy: exynos5-usbdrd: Add 26MHz ref clk support phy: exynos5-usbdrd: Make it possible to pass custom phy ops dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos850 support phy: qcom-qmp-combo: fix clock probing phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYs phy: qcom-qmp-pcie: populate offsets configuration phy: qcom-qmp-pcie: simplify clock handling phy: qcom-qmp-pcie: keep offset tables sorted phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failed phy: qcom: Introduce M31 USB PHY driver dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy phy: rockchip: inno-dsidphy: Add rv1126 support dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126 dt-bindings: phy: mediatek,tphy: allow simple nodename pattern phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warning phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warning ...
| * phy: Explicitly include correct DT includesRob Herring2023-07-175-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mediatek: mipi-dsi: Compress of_device_id match entriesAngeloGioacchino Del Regno2023-07-121-7/+4
| | | | | | | | | | | | | | | | | | | | All of the entries do fit in a maximum of 82 columns, which is acceptable. While at it, also remove the useless comma on the last entry and add the usual sentinel comment. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230525115258.90091-4-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mediatek: mipi-dsi: Use devm variant for of_clk_add_hw_provider()AngeloGioacchino Del Regno2023-07-121-7/+1
| | | | | | | | | | | | | | | | | | | | Switch to devm_of_clk_add_hw_provider() in the probe function: this also allows to entirely remove the .remove_new() callback, as its only task was to unregister the clock provider. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230525115258.90091-3-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mediatek: mipi-dsi: Convert to register clk_hwAngeloGioacchino Del Regno2023-07-122-8/+6
| | | | | | | | | | | | | | | | | | Instead of registering a struct clk, directly register clk_hw: this allows us to cleanup a pointer to struct clk from struct mtk_mipi_tx. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230525115258.90091-2-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: mediatek: hdmi: mt8195: fix prediv bad upper limit testGuillaume Ranquet2023-07-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The pll prediv calculus searchs for the smallest prediv that gets the ns_hdmipll_ck in the range of 5 GHz to 12 GHz. A typo in the upper bound test was testing for 5Ghz to 1Ghz Fixes: 45810d486bb44 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195") Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230529-hdmi_phy_fix-v1-1-bf65f53af533@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: phy-mtk-dp: Fix an error code in probe()Dan Carpenter2023-07-121-1/+1
|/ | | | | | | | | | Negative -EINVAL was intended instead of positive EINVAL. Fixes: 6a23afad443a ("phy: phy-mtk-dp: Add driver for DP phy") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/3c699e00-2883-40d9-92c3-0da1dc38fdd4@moroto.mountain Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: tphy: add debugfs filesChunfeng Yun2023-05-191-0/+356
| | | | | | | | | These debugfs files are mainly used to make eye diagram test easier, especially helpful to do HQA test for a new IC without efuse enabled. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20230513092218.21139-2-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: rework the floating point comparisons to fixed pointTom Rix2023-05-161-5/+5
| | | | | | | | | | | | | | | | gcc on aarch64 reports drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c: In function ‘mtk_hdmi_pll_set_rate’: drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:240:52: error: ‘-mgeneral-regs-only’ is incompatible with the use of floating-point types 240 | else if (tmds_clk >= 54 * MEGA && tmds_clk < 148.35 * MEGA) Floating point should not be used, so rework the floating point comparisons to fixed point. Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20230502145005.2927101-1-trix@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt8195: fix wrong pll calculusGuillaume Ranquet2023-05-041-2/+2
| | | | | | | | | | | | | | The clock rate calculus in mtk_hdmi_pll_calc() was wrong when it has been replaced by 'div_u64'. Fix the issue by multiplying the values in the denominator instead of dividing them. Fixes: 45810d486bb44 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://lore.kernel.org/r/20230413-fixes-for-mt8195-hdmi-phy-v2-2-bbad62e64321@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt8195: fix uninitialized variable usage in pll_calcGuillaume Ranquet2023-05-041-6/+2
| | | | | | | | | | | | | | | | The ret variable in mtk_hdmi_pll_calc() was used unitialized as reported by the kernel test robot. Fix the issue by removing the variable altogether and testing out the return value of mtk_hdmi_pll_set_hw() Fixes: 45810d486bb44 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230413-fixes-for-mt8195-hdmi-phy-v2-1-bbad62e64321@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: add support for phy-mtk-hdmi-mt8195Guillaume Ranquet2023-04-125-0/+614
| | | | | | | | | Add support for the mediatek hdmi phy on MT8195 SoC Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://lore.kernel.org/r/20220919-v8-3-a84c80468fe9@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-hdmi: Add generic phy configure callbackGuillaume Ranquet2023-04-122-0/+13
| | | | | | | | | | Some phys, such as mt8195, needs to have a configure callback defined. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://lore.kernel.org/r/20220919-v8-2-a84c80468fe9@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: phy-mtk-mipi-dsi: Convert to platform remove callback ↵Uwe Kleine-König2023-03-201-3/+2
| | | | | | | | | | | | | | | | | | | returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230307115900.2293120-9-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: remove temporary variable @mask_Chunfeng Yun2023-02-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Remove the temporary @mask_, this may cause build warning when use clang compiler for powerpc, but can't reproduce it when compile for arm64. the build warning is caused by: "warning: result of comparison of constant 18446744073709551615 with expression of type (aka 'unsigned long') is always false [-Wtautological-constant-out-of-range-compare]" More information provided in below lore link. After removing @mask_, there is a "CHECK:MACRO_ARG_REUSE" when run checkpatch.pl, but due to @mask is constant, no reuse problem will happen. Link: https://lore.kernel.org/lkml/202212160357.jJuesD8n-lkp@intel.com/t/ Fixes: 84513eccd678 ("phy: mediatek: fix build warning of FIELD_PREP()") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118084343.26913-1-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-dp: make array driving_params static constColin Ian King2022-09-291-1/+1
| | | | | | | | | Don't populate the read-only array driving_params on the stack but instead make it static const. Also makes the object code a little smaller. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220929130147.97375-1-colin.i.king@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: fix build warning of FIELD_PREP()Chunfeng Yun2022-09-291-5/+6
| | | | | | | | | | | | | | | | Change the inline function mtk_phy_update_field() into a macro to avoid check warning of FIELD_PREP() with compiler parameter -Wtautological-constant-out-of-range-compare the warning is caused by mask check: "BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \" Fixes: 29c07477556e ("phy: mediatek: add a new helper to update bitfield") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220928070746.5393-1-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: remove register access helpersChunfeng Yun2022-09-242-29/+0
| | | | | | | | | Remove private register access helpers, use the common ones instead. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-19-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: mt8183: use common helper to access registersChunfeng Yun2022-09-241-34/+34
| | | | | | | | | | Use MediaTek phy's common helper to access registers, then we can remove mipi-dsi's I/O helpers. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-18-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: mt8183: use GENMASK to generate bits maskChunfeng Yun2022-09-241-3/+3
| | | | | | | | | Use GENMASK() macro to generate bits mask Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-17-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: mt8173: use common helper to access registersChunfeng Yun2022-09-241-62/+55
| | | | | | | | | | Use MediaTek phy's common helper to access registers, then we can remove mipi-dsi's I/O helpers. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-16-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: mt8173: use FIELD_PREP to prepare bits fieldChunfeng Yun2022-09-241-4/+10
| | | | | | | | | | Use FIELD_PREP() macro to prepare bits field value, then no need define macros of bits offset. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-15-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: mipi: mt8173: use GENMASK to generate bits maskChunfeng Yun2022-09-241-24/+29
| | | | | | | | | Use GENMASK() macro to generate bits mask Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-14-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: remove register access helpersChunfeng Yun2022-09-242-40/+0
| | | | | | | | | Remove private register access helpers, use the common ones instead. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-13-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt8173: use common helper to access registersChunfeng Yun2022-09-241-75/+65
| | | | | | | | | | Use MediaTek phy's common helper to access registers, then we can remove hdmi's I/O helpers. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-12-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt8173: use FIELD_PREP to prepare bits fieldChunfeng Yun2022-09-241-44/+26
| | | | | | | | | | Use FIELD_PREP() macro to prepare bits field value, then no need define macros of bits offset. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-11-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt8173: use GENMASK to generate bits maskChunfeng Yun2022-09-241-44/+44
| | | | | | | | | Use GENMASK() macro to generate bits mask Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-10-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt2701: use common helper to access registersChunfeng Yun2022-09-241-75/+71
| | | | | | | | | | Use MediaTek phy's common helper to access registers, then we can remove hdmi's I/O helpers. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-9-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt2701: use FIELD_PREP to prepare bits fieldChunfeng Yun2022-09-241-39/+21
| | | | | | | | | | Use FIELD_PREP() macro to prepare bits field value, then no need define macros of bits offset. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-8-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: hdmi: mt2701: use GENMASK and BIT to generate mask and bitsChunfeng Yun2022-09-241-28/+28
| | | | | | | | | Use GENMASK() and BIT() macros to generate mask and bits Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-7-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: pcie: use new helper to update register bitsChunfeng Yun2022-09-241-9/+8
| | | | | | | | | | The new helper will use FIELD_PREP() macro to prepare bits value according to mask, then we no need do it anymore. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-6-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: ufs: use common register access helpersChunfeng Yun2022-09-241-50/+28
| | | | | | | | | | No need define private register access helpers, use common ones defined in phy-mtk-io.h Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220920090038.15133-5-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: xsphy: remove macros used to prepare bitfield valueChunfeng Yun2022-09-241-29/+17
| | | | | | | | | Prefer to make use of FIELD_PREP() macro to prepare bitfield value, then no need local ones anymore. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20220920090038.15133-4-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: tphy: remove macros to prepare bitfield valueChunfeng Yun2022-09-241-126/+67
| | | | | | | | | Prefer to make use of FIELD_PREP() macro to prepare bitfield value, then no need local ones anymore. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20220920090038.15133-3-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: add a new helper to update bitfieldChunfeng Yun2022-09-241-0/+7
| | | | | | | | | | Due to FIELD_PREP() macro can be used to prepare a bitfield value, local ones can be remove; add the new helper to make bitfield update easier. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20220920090038.15133-2-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-tphy: fix the phy type setting issueChunfeng Yun2022-09-201-3/+4
| | | | | | | | | | | The PHY type is not set if the index is non zero, prepare type value according to the index, like as mask value. Fixes: 39099a443358 ("phy: phy-mtk-tphy: support type switch by pericfg") Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220914060746.10004-7-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-tphy: set utmi 0 register in init() opsChunfeng Yun2022-09-201-7/+2
| | | | | | | | | | No need repeat to clear utmi 0 register in ->power_on() and ->power_off(), just do it in ->init() Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220914060746.10004-6-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-tphy: disable gpio mode for all usb2 physChunfeng Yun2022-09-201-2/+1
| | | | | | | | | | Disable DP/DM's GPIO mode for all usb2 phy, not only for the first usb2 phy which usually supports dual-role mode. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220914060746.10004-5-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-tphy: disable hardware efuse when set INTRChunfeng Yun2022-09-201-1/+6
| | | | | | | | | | | INTR's value is able autoload from hardware efuse by default, when software tries to update its value, should disable hardware efuse firstly. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20220914060746.10004-4-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-tphy: add property to set pre-emphasisChunfeng Yun2022-09-201-0/+10
| | | | | | | | | | Add a property to set usb2 phy's pre-emphasis, it's disabled by default on some SoCs. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220914060746.10004-3-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-dp: change mtk_dp_phy_driver to staticYang Yingliang2022-07-081-1/+1
| | | | | | | | mtk_dp_phy_driver is only used in phy-mtk-dp.c now, change it to static. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220707135309.801181-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: phy-mtk-dp: Add driver for DP phyMarkus Schneider-Pargmann2022-07-053-0/+211
| | | | | | | | | | | | | | | | | | | | | | | This is a new driver that supports the integrated DisplayPort phy for mediatek SoCs, especially the mt8195. The phy is integrated into the DisplayPort controller and will be created by the mtk-dp driver. This driver expects a struct regmap to be able to work on the same registers as the DisplayPort controller. It sets the device data to be the struct phy so that the DisplayPort controller can easily work with it. The driver does not have any devicetree bindings because the datasheet does not list the controller and the phy as distinct units. The interaction with the controller can be covered by the configure callback of the phy framework and its displayport parameters. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> [Bo-Chen: Modify reviewers' comments.] Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220624062725.4095-1-rex-bc.chen@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: Add PCIe PHY driverJianjun Wang2022-07-053-0/+279
| | | | | | | | | | Add PCIe GEN3 PHY driver support on MediaTek chipsets. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioachino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220617070246.20142-3-jianjun.wang@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: mediatek: phy-mtk-hdmi: Simplify with dev_err_probe()AngeloGioacchino Del Regno2022-04-131-31/+19
| | | | | | | | Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220328111046.210736-1-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-02 14:33:08 +0000