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path: root/drivers/pinctrl/intel
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* Merge tag 'intel-pinctrl-v5.17-5' of gitolite.kernel.org:pub/scm/linux/kernel...Linus Walleij2022-02-191-1/+0
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| * pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"Andy Shevchenko2022-02-151-1/+0
* | Merge tag 'intel-pinctrl-v5.17-4' of gitolite.kernel.org:pub/scm/linux/kernel...Linus Walleij2022-01-301-28/+36
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| * pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured lineAndy Shevchenko2022-01-241-8/+2
| * pinctrl: intel: fix unexpected interruptŁukasz Bartosik2022-01-241-20/+34
* | pinctrl: cherryview: Trigger hwirq0 for interrupt-lines without a mappingHans de Goede2022-01-241-2/+3
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* pinctrl: cherryview: Use temporary variable for struct deviceAndy Shevchenko2021-11-261-28/+29
* pinctrl: cherryview: Do not allow the same interrupt line to be used by 2 pinsHans de Goede2021-11-261-8/+61
* pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unusedHans de Goede2021-11-261-2/+16
* pinctrl: baytrail: Set IRQCHIP_SET_TYPE_MASKED flag on the irqchipHans de Goede2021-11-231-1/+1
* pinctrl: intel: Kconfig: Add configuration menu to Intel pin controlCai Huoqing2021-10-261-3/+3
* Merge tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2021-08-303-14/+6
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| * pinctrl: Bulk conversion to generic_handle_domain_irq()Marc Zyngier2021-08-123-14/+6
* | pinctrl: tigerlake: Fix GPIO mapping for newer version of softwareAndy Shevchenko2021-08-041-13/+13
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* pinctrl: tigerlake: Add Alder Lake-M ACPI IDAndy Shevchenko2021-05-251-0/+1
* Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2021-04-301-3/+2
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| * pinctrl: intel: No need to disable IRQs in the handlerAndy Shevchenko2021-03-251-3/+2
* | pinctrl: lewisburg: Update number of pins in communityYuanyuan Zhong2021-04-131-3/+3
* | pinctrl: intel: check REVID register value for device presenceRoger Pau Monne2021-03-251-1/+6
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* pinctrl: intel: Show the GPIO base calculation explicitlyAndy Shevchenko2021-03-081-0/+2
* pinctrl: tigerlake: Add Alder Lake-P ACPI IDAndy Shevchenko2021-01-081-0/+1
* pinctrl: intel: Convert capability list to featuresAndy Shevchenko2021-01-082-3/+42
* pinctrl: intel: Drop unnecessary check for predefined featuresAndy Shevchenko2021-01-081-12/+6
* pinctrl: intel: Split intel_pinctrl_add_padgroups() for better maintenanceAndy Shevchenko2021-01-081-20/+40
* Merge tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2020-12-166-4/+1359
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| * pinctrl: baytrail: Avoid clearing debounce value when turning it offAndy Shevchenko2020-11-161-1/+7
| * pinctrl: merrifield: Set default bias in case no particular value givenAndy Shevchenko2020-11-121-0/+8
| * pinctrl: jasperlake: Fix HOSTSW_OWN offsetEvan Green2020-11-121-1/+1
| * pinctrl: jasperlake: Unhide SPI group of pinsAndy Shevchenko2020-11-121-220/+230
| * pinctrl: lynxpoint: Enable pin configuration setting for GPIO chipAndy Shevchenko2020-11-121-0/+1
| * pinctrl: lynxpoint: Use defined constant for disabled bias explicitlyAndy Shevchenko2020-11-121-2/+4
| * pinctrl: lynxpoint: Unify initcall location in the codeAndy Shevchenko2020-11-041-2/+1
| * pinctrl: intel: Add Intel Alder Lake-S pin controller supportAndy Shevchenko2020-11-043-0/+446
| * pinctrl: intel: Add Intel Elkhart Lake pin controller supportAndy Shevchenko2020-11-043-0/+522
| * pinctrl: intel: Add blank line before endif in KconfigAndy Shevchenko2020-11-021-0/+1
| * pinctrl: intel: Add Intel Lakefield pin controller supportAndy Shevchenko2020-11-023-0/+384
* | pinctrl: intel: Actually disable Tx and Rx buffers on GPIO requestAndy Shevchenko2020-12-091-2/+2
* | pinctrl: baytrail: Avoid clearing debounce value when turning it offAndy Shevchenko2020-11-161-1/+7
* | pinctrl: merrifield: Set default bias in case no particular value givenAndy Shevchenko2020-11-161-0/+8
* | pinctrl: jasperlake: Fix HOSTSW_OWN offsetEvan Green2020-11-161-1/+1
* | pinctrl: jasperlake: Unhide SPI group of pinsAndy Shevchenko2020-11-161-220/+230
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* pinctrl: intel: Set default bias in case no particular value givenAndy Shevchenko2020-10-261-0/+8
* pinctrl: intel: Fix 2 kOhm bias which is 833 OhmAndy Shevchenko2020-10-261-10/+22
* pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistentAndy Shevchenko2020-09-301-33/+27
* pinctrl: cannonlake: Modify COMMUNITY macros to be consistentAndy Shevchenko2020-09-301-11/+11
* pinctrl: tigerlake: Fix register offsets for TGL-H variantAndy Shevchenko2020-09-301-17/+25
* pinctrl: cherryview: Preserve CHV_PADCTRL1_INVRXTX_TXDATA flag on GPIOsHans de Goede2020-09-071-1/+13
* pinctrl: intel: Update header block to reflect direct dependenciesAndy Shevchenko2020-08-201-1/+4
* pinctrl: cherryview: Switch to use intel_pinctrl_get_soc_data()Andy Shevchenko2020-08-202-22/+7
* pinctrl: baytrail: Switch to use intel_pinctrl_get_soc_data()Andy Shevchenko2020-08-202-24/+6
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