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path: root/drivers/staging/rtl8192e
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* staging: rtl8192e: indent statement properlyIan Kewish2021-04-221-1/+1
* staging: rtl8192e: removed multiple blank linesMitali Borkar2021-04-141-7/+0
* staging: rtl8192e: remove unnecessary blank line after close braceMitali Borkar2021-04-141-2/+0
* staging: rtl8192e: remove unnecessary blank line before braceMitali Borkar2021-04-142-4/+0
* staging: rtl8192e: add spaces around binary operatorsMitali Borkar2021-04-142-8/+8
* staging: rtl8192e: remove unnecessary ftrace-like loggingMitali Borkar2021-04-131-4/+0
* staging: rtl8192e: Fix incorrect pointer checkMitali Borkar2021-04-111-1/+1
* staging: rtl8192e: remove unnecesasry f-trace like loggingMitali Borkar2021-04-101-1/+0
* staging: rtl8192e: replace comparison to NULL by boolMitali Borkar2021-04-101-3/+3
* staging: rtl8192e: rtl8192E_dev: remove unused variableJiapeng Chong2021-04-071-3/+3
* staging: rtl8192e: move const after staticDeborah Brouwer2021-04-051-2/+2
* Merge 5.12-rc6 into staging-nextGreg Kroah-Hartman2021-04-052-2/+2
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| * staging: rtl8192e: Change state information from u16 to u8Atul Gopinathan2021-03-231-1/+1
| * staging: rtl8192e: Fix incorrect source in memcpy()Atul Gopinathan2021-03-231-1/+1
* | Merge 5.12-rc3 into staging-nextGreg Kroah-Hartman2021-03-152-3/+5
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| * staging: rtl8192e: Fix possible buffer overflow in _rtl92e_wx_set_scanLee Gibson2021-03-101-3/+4
| * staging: rtl8192e: fix kconfig dependency on CRYPTOJulian Braha2021-03-101-0/+1
* | staging: rtl8192e: remove redundant variable shadowingNikolay Kyx2021-03-101-5/+3
* | staging: rtl8192e: reformat rx_ts_record structWilliam Durand2021-03-101-7/+7
* | staging: rtl8192e: rename RxLastFragNum to rx_last_frag_num in rx_ts_record s...William Durand2021-03-102-3/+3
* | staging: rtl8192e: rename RxLastSeqNum to rx_last_seq_num in rx_ts_record structWilliam Durand2021-03-102-3/+3
* | staging: rtl8192e: rename RxAdmittedBARecord to rx_admitted_ba_record in rx_t...William Durand2021-03-103-8/+8
* | staging: rtl8192e: rename RxPktPendingTimer to rx_pkt_pending_timer in rx_ts_...William Durand2021-03-103-10/+10
* | staging: rtl8192e: rename RxPendingPktList to rx_pending_pkt_list in rx_ts_re...William Durand2021-03-103-12/+12
* | staging: rtl8192e: rename RxTimeoutIndicateSeq to rx_timeout_indicate_seq in ...William Durand2021-03-103-9/+9
* | staging: rtl8192e: rename RxIndicateSeq to rx_indicate_seq in rx_ts_record st...William Durand2021-03-103-30/+30
* | staging: rtl8192e: rename TsCommonInfo to ts_common_info in rx_ts_record structWilliam Durand2021-03-103-7/+7
* | staging: rtl8192e: reformat bss_ht structWilliam Durand2021-03-101-9/+9
* | staging: rtl8192e: rename bdHT1R to bd_ht_1r in bss_ht structWilliam Durand2021-03-102-5/+5
* | staging: rtl8192e: rename RT2RT_HT_Mode to rt2rt_ht_mode in bss_ht structWilliam Durand2021-03-104-8/+8
* | staging: rtl8192e: rename bdRT2RTLongSlotTime to bd_rt2rt_long_slot_time in b...William Durand2021-03-104-7/+6
* | staging: rtl8192e: rename bdRT2RTAggregation to bd_rt2rt_aggregation in bss_h...William Durand2021-03-103-9/+9
* | staging: rtl8192e: rename bdBandWidth to bd_bandwidth in bss_ht structWilliam Durand2021-03-102-3/+3
* | staging: rtl8192e: rename bdHTSpecVer to bd_ht_spec_ver in bss_ht structWilliam Durand2021-03-103-8/+8
* | staging: rtl8192e: rename bdHTInfoLen to bd_ht_info_len in bss_ht structWilliam Durand2021-03-104-14/+14
* | staging: rtl8192e: rename bdHTInfoBuf to bd_ht_info_buf in bss_ht structWilliam Durand2021-03-104-11/+12
* | staging: rtl8192e: rename bdHTCapLen to bd_ht_cap_len in bss_ht structWilliam Durand2021-03-104-12/+12
* | staging: rtl8192e: rename bdHTCapBuf to bd_ht_cap_buf in bss_ht structWilliam Durand2021-03-105-15/+16
* | staging: rtl8192e: rename bdSupportHT to bd_support_ht in bss_ht structWilliam Durand2021-03-104-12/+12
* | staging: rtl8192e: remove blank line in bss_ht structWilliam Durand2021-03-101-1/+0
* | staging: rtl8192e: fix alignment issues in rtllib_wx.cWilliam Durand2021-03-101-24/+18
* | staging: rtl8192e: reformat ba_record structWilliam Durand2021-03-101-4/+4
* | staging: rtl8192e: rename BaStartSeqCtrl to ba_start_seq_ctrl in ba_record st...William Durand2021-03-103-11/+11
* | staging: rtl8192e: rename BaTimeoutValue to ba_timeout_value in ba_record structWilliam Durand2021-03-102-7/+7
* | staging: rtl8192e: rename BaParamSet to ba_param_set in ba_record structWilliam Durand2021-03-102-15/+15
* | staging: rtl8192e: rename DialogToken to dialog_token in ba_record structWilliam Durand2021-03-102-8/+8
* | staging: rtl8192e: rename bValid to b_valid in ba_record structWilliam Durand2021-03-103-13/+13
* | staging: rtl8192e: rename Timer to timer in ba_record structWilliam Durand2021-03-103-9/+9
* | staging: rtl8192e: rename TID to tid in delba_param_set unionWilliam Durand2021-03-102-5/+5
* | staging: rtl8192e: rename Initiator to initiator in delba_param_set unionWilliam Durand2021-03-102-3/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-16 01:49:43 +0000