| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: meson8b: export the ethernet gate clock | Martin Blumenstingl | 2017-06-12 | 1 | -0/+1 |
| * | clk: meson8b: export the USB clocks | Martin Blumenstingl | 2017-06-12 | 1 | -0/+5 |
| * | clk: meson8b: export the gate clock for the HW random number generator | Martin Blumenstingl | 2017-06-12 | 1 | -0/+1 |
| * | clk: meson8b: export the SDIO clock | Martin Blumenstingl | 2017-06-12 | 1 | -0/+1 |
| * | clk: meson8b: export the SAR ADC clocks | Martin Blumenstingl | 2017-06-12 | 1 | -0/+2 |
| * | clk: meson: Copy meson8b CLKID defines to private header file | Alexander Müller | 2016-09-01 | 1 | -2/+0 |
| * | clk: meson8b: clean up composite clocks | Michael Turquette | 2016-06-22 | 1 | -1/+3 |
| * | clk: meson: Add support for Meson clock controller | Carlo Caione | 2015-06-05 | 1 | -0/+25 |
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