| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | mtd: rawnand: sh_flctl: convert to SPDX identifiers | Kuninori Morimoto | 2018-11-13 | 1 | -14/+2 |
| * | mtd: nand: Rename nand.h into rawnand.h | Boris Brezillon | 2017-08-13 | 1 | -1/+1 |
| * | mtd: sh_flctl: pass FIFO as physical address | Arnd Bergmann | 2015-12-18 | 1 | -0/+1 |
| * | mtd: nand: sh_flctl: use the mtd instance embedded in struct nand_chip | Boris BREZILLON | 2015-12-18 | 1 | -2/+1 |
| * | mtd: sh_flctl: Add DMA capabilty | Bastian Hecht | 2012-11-15 | 1 | -0/+12 |
| * | mtd: sh_flctl: Minor cleanups | Bastian Hecht | 2012-11-15 | 1 | -1/+1 |
| * | mtd: sh_flctl: Restructure the hardware ECC handling | Bastian Hecht | 2012-07-06 | 1 | -3/+7 |
| * | mtd: sh_flctl: Use different OOB layout | Bastian Hecht | 2012-07-06 | 1 | -4/+0 |
| * | mtd: sh_flctl: Add support for error IRQ | Bastian Hecht | 2012-07-06 | 1 | -0/+9 |
| * | mtd: sh_flctl: Add power management with QoS request | Bastian Hecht | 2012-03-27 | 1 | -0/+3 |
| * | mtd: sh_flctl: Add FLHOLDCR register | Bastian Hecht | 2012-03-27 | 1 | -0/+12 |
| * | mtd: sh_flctl: Use cached register value for FLCMNCR | Bastian Hecht | 2012-03-27 | 1 | -0/+1 |
| * | mtd: sh_flctl: Expand FLCMNCR register bit field | Bastian Hecht | 2012-03-27 | 1 | -0/+24 |
| * | mtd/nand/sh_flctl: Move function mtd_to_flctl to fix build failure | Peter Huewe | 2010-05-12 | 1 | -5/+5 |
| * | mtd/nand/sh_flctl: Replace the dangerous mtd_to_flctl macro | Ferenc Wagner | 2010-05-10 | 1 | -1/+4 |
| * | mtd: sh_flctl SHBUSSEL and SEL_16BIT support | Magnus Damm | 2010-02-02 | 1 | -0/+2 |
| * | mtd: trivial sh_flctl changes | Magnus Damm | 2010-02-02 | 1 | -0/+1 |
| * | [MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL | Yoshihiro Shimoda | 2008-10-14 | 1 | -0/+125 |
