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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner2019-05-211-2/+1
| | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-05-161-0/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: Among the larger pieces: - Power management improvements for TI am335x and am437x (RTC suspend/wake) - Misc new additions for Amlogic (socinfo updates) - ZynqMP FPGA manager - Nvidia improvements for reset/powergate handling - PMIC wrapper for Mediatek MT8516 - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) soc: aspeed: fix Kconfig soc: add aspeed folder and misc drivers spi: zynqmp: Fix build break soc: imx: Add generic i.MX8 SoC driver MAINTAINERS: Update email for Qualcomm SoC maintainer memory: tegra: Fix a typos for "fdcdwr2" mc client Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+" memory: tegra: Replace readl-writel with mc_readl-mc_writel memory: tegra: Fix integer overflow on tick value calculation memory: tegra: Fix missed registers values latching ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30 optee: allow to work without static shared memory soc/tegra: pmc: Move powergate initialisation to probe soc/tegra: pmc: Remove reset sysfs entries on error soc/tegra: pmc: Fix reset sources and levels soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask fpga manager: Adding FPGA Manager support for Xilinx zynqmp dt-bindings: fpga: Add bindings for ZynqMP fpga driver firmware: xilinx: Add fpga API's ...
| * rtc: OMAP: Add support for rtc-only modeKeerthy2019-04-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare rtc driver for rtc-only with DDR in self-refresh mode. omap_rtc_power_off now should cater to two features: 1) RTC plus DDR in self-refresh is power a saving mode where in the entire system including the different voltage rails from PMIC are shutdown except the ones feeding on to RTC and DDR. DDR is kept in self-refresh hence the contents are preserved. RTC ALARM2 is connected to PMIC_EN line once we the ALARM2 is triggered we enter the mode with DDR in self-refresh and RTC Ticking. After a predetermined time an RTC ALARM1 triggers waking up the system[1]. The control goes to bootloader. The bootloader then checks RTC scratchpad registers to confirm it was an rtc_only wakeup and follows a different path, configure bare minimal clocks for ddr and then jumps to the resume address in another RTC scratchpad registers and transfers the control to Kernel. Kernel then restores the saved context. omap_rtc_power_off_program does the ALARM2 programming part. [1] http://www.ti.com/lit/ug/spruhl7h/spruhl7h.pdf Page 2884 2) Power-off: This is usual poweroff mode. omap_rtc_power_off calls the above omap_rtc_power_off_program function and in addition to that programs the OMAP_RTC_PMIC_REG for any external wake ups for PMIC like the pushbutton and shuts off the PMIC. Hence the split in omap_rtc_power_off. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [tony@atomide.com: folded in a fix for compile warning] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | rtc: ds1685: use threaded interruptThomas Bogendoerfer2019-04-161-2/+0
|/ | | | | | | | | | | | Handling of extended interrupts (kickstart, wake-up, ram-clear) was moved off to a work queue, but the interrupts aren't acknowledged in the interrupt handler. This leads to a deadlock, if driver is used with interrupts. To fix this we use a threaded interrupt, get rid of the work queue and do locking with just the rtc mutex lock. Fixes: aaaf5fbf56f1 ("rtc: add driver for DS1685 family of real time clocks") Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
* rtc: ds1286: move header to linux/rtcAlexandre Belloni2016-07-081-0/+52
| | | | | | Move ds1286.h to rtc specific folder. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
* ARM: prima2: move to use REGMAP APIs for rtciobrgGuo Zeng2015-06-101-0/+4
| | | | | | | | | | | | | all devices behind rtciobrg needs a special way to access. currently they are using a platform-specific API. this patch moves to REGMAP, then clients can use regmap APIs to read/write. for the moment, old APIs are still kept, once all clients move to regmap, old APIs will be dropped. this patch also does minor clean for comments, authors statement. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
* rtc: add driver for DS1685 family of real time clocksJoshua Kinard2015-02-161-0/+375
| | | | | | | | | | | | | | | | | | | | This adds a driver for the Dallas/Maxim DS1685-family of RTC chips. It supports the DS1685/DS1687, DS1688/DS1691, DS1689/DS1693, DS17285/DS17287, DS17485/DS17487, and DS17885/DS17887 RTC chips. These chips are commonly found in SGI O2 and SGI Octane systems. It was originally derived from a driver patch submitted by Matthias Fuchs many years ago for use in EPPC-405-UC modules, which also used these RTCs. In addition to the time-keeping functions, this RTC also handles the shutdown mechanism of the O2 and Octane and acts as a partial NVRAM for the boot PROMS in these systems. Verified on both an SGI O2 and an SGI Octane. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* rtc: ds1307: add trickle charger supportWolfram Sang2012-05-291-0/+22
| | | | | | | | | | | | Some DS13XX devices have "trickle chargers". Its configuration register is at different locations, the setup is the same, though. Since the configuration is board specific, introduce a platform_data to this driver. Tested with a DS1339 on a custom board. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Alessandro Zummo <alessandro.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: CSR: add rtc i/o bridge interface for SiRFprimaIIZhiwu Song2011-09-111-0/+18
| | | | | | | | | | | The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* rtc-m48t59: allow externally mapped ioaddrKrzysztof Helt2008-09-031-0/+2
| | | | | | | | Add support for externally mapped ioaddr. This is required on sparc32 as the ioaddr must be mapped with of_ioremap(). Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
* rtc-m48t59: add support for M48T02 and M48T59 chipsKrzysztof Helt2008-09-031-20/+25
| | | | | | | | | | | | | | | | Add support for two compatible RTC: - M48T08 which does not have alarm part, - M48T08 which does not have alarm part and has only 2KB of NVRAM These types covers all Mostek's RTC used in Sun UltraSparc workstations. Tested on Sun Ultra60 with M48T59 RTC. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* rtc: add support for the ST M48T59 RTCMark Zhan2007-07-171-0/+57
[akpm@linux-foundation.org: x86_64 build fix] [akpm@linux-foundation.org: The acpi guys changed the bin_attribute code] Signed-off-by: Mark Zhan <rongkai.zhan@windriver.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>