| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | ASoC: Intel: common: clarify Copyright information | Pierre-Louis Bossart | 2024-05-06 | 1 | -1/+1 |
| * | ASoC: Intel: Remove unused DSP operations | Cezary Rojewski | 2020-10-06 | 1 | -162/+0 |
| * | ASoC: Intel: Use readq to read 64 bit registers | Amadeusz Sławiński | 2020-05-12 | 1 | -6/+3 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 2019-05-30 | 1 | -10/+1 |
| * | ASoC: Intel: Skylake: Remove second shim read in register_poll | Subhransu S. Prusty | 2017-12-06 | 1 | -3/+1 |
| * | ASoC: Intel: Common: Update dsp register poll implementation | Jeeja KP | 2017-01-06 | 1 | -26/+26 |
| * | ASoC: intel: Fix sst-dsp dependency on dw stuff | Takashi Iwai | 2016-07-11 | 1 | -67/+0 |
| * | ASoC: Intel: common: increase the loglevel of "FW Poll Status". | Vedang Patel | 2016-06-27 | 1 | -1/+1 |
| * | ASoC: Intel: sst: only select sst-firmware when DW DMAC is built-in | Jie Yang | 2015-11-25 | 1 | -1/+1 |
| * | ASoC: Intel: sst: only use sst-firmware when DW DMAC is available | Jie Yang | 2015-10-22 | 1 | -0/+2 |
| * | ASoC: Intel: Add helper to update register bits with attr RWC | Subhransu S. Prusty | 2015-07-09 | 1 | -0/+28 |
| * | ASoC: Intel: Add helper to poll register for DSP status | Subhransu S. Prusty | 2015-07-09 | 1 | -0/+43 |
| * | ASoC: Intel: create common folder and move common files in | Jie Yang | 2015-04-06 | 1 | -0/+420 |
