| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1 | Mark Rutland | 2017-06-15 | 1 | -2/+2 |
| * | KVM: arm64: Log an error if trapping a write-to-read-only GICv3 access | Marc Zyngier | 2017-06-15 | 1 | -0/+6 |
| * | KVM: arm64: Log an error if trapping a read-from-write-only GICv3 access | Marc Zyngier | 2017-06-15 | 1 | -0/+4 |
| * | KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+27 |
| * | KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+46 |
| * | KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+10 |
| * | KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+27 |
| * | KVM: arm64: vgic-v3: Add misc Group-0 handlers | Marc Zyngier | 2017-06-15 | 1 | -0/+7 |
| * | KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+23 |
| * | KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+28 |
| * | KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers | Marc Zyngier | 2017-06-15 | 1 | -0/+11 |
| * | KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+23 |
| * | KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+94 |
| * | KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+120 |
| * | KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+163 |
| * | KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+23 |
| * | KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler | Marc Zyngier | 2017-06-15 | 1 | -0/+57 |
| * | KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 | Marc Zyngier | 2017-06-15 | 1 | -0/+38 |
| * | KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers | Marc Zyngier | 2017-06-15 | 1 | -16/+100 |
| * | KVM: arm/arm64: vgic-v3: Fix nr_pre_bits bitfield extraction | Christoffer Dall | 2017-06-06 | 1 | -1/+1 |
| * | KVM: arm/arm64: vgic-v3: Use PREbits to infer the number of ICH_APxRn_EL2 reg... | Marc Zyngier | 2017-05-15 | 1 | -9/+9 |
| * | KVM: arm/arm64: vgic-v3: Fix off-by-one LR access | Marc Zyngier | 2017-04-19 | 1 | -1/+1 |
| * | KVM: arm/arm64: vgic-v3: De-optimize VMCR save/restore when emulating a GICv2 | Marc Zyngier | 2017-04-19 | 1 | -2/+6 |
| * | KVM: arm/arm64: vgic: Get rid of MISR and EISR fields | Christoffer Dall | 2017-04-09 | 2 | -4/+0 |
| * | KVM: arm/arm64: vgic: Get rid of unnecessary save_maint_int_state | Christoffer Dall | 2017-04-09 | 2 | -69/+0 |
| * | KVM: arm/arm64: vgic: Get rid of live_lrs | Christoffer Dall | 2017-04-09 | 2 | -59/+22 |
| * | KVM: arm/arm64: vgic: Defer touching GICH_VMCR to vcpu_load/put | Christoffer Dall | 2017-04-09 | 2 | -7/+10 |
| * | KVM: arm/arm64: Move cntvoff to each timer context | Jintack Lim | 2017-02-08 | 1 | -2/+1 |
| * | KVM: arm/arm64: Abstract virtual timer context into separate structure | Jintack Lim | 2017-02-08 | 1 | -4/+6 |
| * | KVM: arm64: Access CNTHCTL_EL2 bit fields correctly on VHE systems | Jintack Lim | 2017-01-13 | 1 | -12/+21 |
| * | arm64: KVM: Move vgic-v3 save/restore to virt/kvm/arm/hyp | Vladimir Murzin | 2016-09-22 | 1 | -0/+328 |
| * | arm64: KVM: Inject a vSerror if detecting a bad GICV access at EL2 | Marc Zyngier | 2016-09-08 | 1 | -5/+16 |
| * | arm64: KVM: vgic-v2: Add GICV access from HYP | Marc Zyngier | 2016-09-08 | 1 | -0/+39 |
| * | arm64: KVM: vgic-v2: Add the GICV emulation infrastructure | Marc Zyngier | 2016-09-08 | 1 | -0/+7 |
| * | KVM: arm/arm64: The GIC is dead, long live the GIC | Marc Zyngier | 2016-07-03 | 1 | -11/+4 |
| * | KVM: arm/arm64: vgic-v2: Clear all dirty LRs | Christoffer Dall | 2016-05-31 | 1 | -4/+3 |
| * | KVM: arm/arm64: vgic-new: enable build | Andre Przywara | 2016-05-20 | 1 | -0/+5 |
| * | KVM: arm/arm64: Get rid of vgic_cpu->nr_lr | Christoffer Dall | 2016-05-20 | 1 | -5/+7 |
| * | KVM: arm/arm64: Move timer IRQ map to latest possible time | Christoffer Dall | 2016-05-20 | 1 | -3/+2 |
| * | KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit | Marc Zyngier | 2016-03-09 | 1 | -5/+5 |
| * | KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty | Marc Zyngier | 2016-03-09 | 1 | -6/+20 |
| * | KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function | Marc Zyngier | 2016-03-09 | 1 | -15/+21 |
| * | KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required | Marc Zyngier | 2016-03-09 | 1 | -7/+47 |
| * | KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers | Marc Zyngier | 2016-03-09 | 1 | -22/+50 |
| * | arm64: KVM: Move vgic-v2 and timer save/restore to virt/kvm/arm/hyp | Marc Zyngier | 2016-02-29 | 2 | -0/+151 |
