blob: a33c4fc29ae52a2e9f205ad309534ceaa80f844d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
|
// SPDX-License-Identifier: GPL-2.0
/*
* SAMSUNG SSDK5440 board device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*/
/dts-v1/;
#include "exynos5440.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "SAMSUNG SSDK5440 board based on EXYNOS5440";
compatible = "samsung,ssdk5440", "samsung,exynos5440", "samsung,exynos5";
chosen {
bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200";
};
/* FIXME: set reg property with correct start address and size */
memory@0 {
device_type = "memory";
reg = <0 0>;
};
fixed-rate-clocks {
xtal {
compatible = "samsung,clock-xtal";
clock-frequency = <50000000>;
};
};
};
&pcie_0 {
reset-gpio = <&pin_ctrl 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie_1 {
reset-gpio = <&pin_ctrl 22 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&spi_0 {
flash: w25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128";
spi-max-frequency = <15625000>;
reg = <0>;
controller-data {
samsung,spi-feedback-delay = <0>;
};
partition@0 {
label = "BootLoader";
reg = <0x60000 0x80000>;
read-only;
};
partition@e0000 {
label = "Recovery-Kernel";
reg = <0xe0000 0x300000>;
read-only;
};
partition@3e0000 {
label = "CRAM-FS";
reg = <0x3e0000 0x700000>;
read-only;
};
partition@ae0000 {
label = "User-Data";
reg = <0xae0000 0x520000>;
};
};
};
|
