summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/exynos5440.dtsi
blob: 5f3562ad67463a89a2bac80a81b1ac01c46907af (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
/*
 * SAMSUNG EXYNOS5440 SoC device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

/include/ "skeleton.dtsi"

/ {
	compatible = "samsung,exynos5440";

	interrupt-parent = <&gic>;

	gic:interrupt-controller@2E0000 {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
	};

	cpus {
		cpu@0 {
			compatible = "arm,cortex-a15";
			timer {
				compatible = "arm,armv7-timer";
				interrupts = <1 13 0xf08>;
				clock-frequency = <1000000>;
			};
		};
		cpu@1 {
			compatible = "arm,cortex-a15";
			timer {
				compatible = "arm,armv7-timer";
				interrupts = <1 14 0xf08>;
				clock-frequency = <1000000>;
			};
		};
		cpu@2 {
			compatible = "arm,cortex-a15";
			timer {
				compatible = "arm,armv7-timer";
				interrupts = <1 14 0xf08>;
				clock-frequency = <1000000>;
			};
		};
		cpu@3 {
			compatible = "arm,cortex-a15";
			timer {
				compatible = "arm,armv7-timer";
				interrupts = <1 14 0xf08>;
				clock-frequency = <1000000>;
			};
		};
	};

	common {
		compatible = "samsung,exynos5440";

	};

	serial@B0000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0xB0000 0x1000>;
		interrupts = <0 2 0>;
	};

	serial@C0000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0xC0000 0x1000>;
		interrupts = <0 3 0>;
	};

	spi {
		compatible = "samsung,exynos4210-spi";
		reg = <0xD0000 0x1000>;
		interrupts = <0 4 0>;
		tx-dma-channel = <&pdma0 5>; /* preliminary */
		rx-dma-channel = <&pdma0 4>; /* preliminary */
		#address-cells = <1>;
		#size-cells = <0>;
	};

	pinctrl {
		compatible = "samsung,exynos5440-pinctrl";
		reg = <0xE0000 0x1000>;
		interrupt-controller;
		#interrupt-cells = <2>;
		#gpio-cells = <2>;

		fan: fan {
			samsung,exynos5440-pin-function = <1>;
		};

		hdd_led0: hdd_led0 {
			samsung,exynos5440-pin-function = <2>;
		};

		hdd_led1: hdd_led1 {
			samsung,exynos5440-pin-function = <3>;
		};

		uart1: uart1 {
			samsung,exynos5440-pin-function = <4>;
		};
	};

	i2c@F0000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0xF0000 0x1000>;
		interrupts = <0 5 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c@100000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x100000 0x1000>;
		interrupts = <0 6 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	watchdog {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x110000 0x1000>;
		interrupts = <0 1 0>;
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@121A0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x120000 0x1000>;
			interrupts = <0 34 0>;
		};

		pdma1: pdma@121B0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x121000 0x1000>;
			interrupts = <0 35 0>;
		};
	};

	rtc {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x130000 0x1000>;
		interrupts = <0 17 0>, <0 16 0>;
	};
};