summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/st/stm32mp135.dtsi
blob: 834a4d545fe448c15feea3a3acd169da1da73e91 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
 */

#include "stm32mp133.dtsi"

/ {
	soc {
		dcmipp: dcmipp@5a000000 {
			compatible = "st,stm32mp13-dcmipp";
			reg = <0x5a000000 0x400>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc DCMIPP_R>;
			clocks = <&rcc DCMIPP_K>;
			status = "disabled";

			port {
			};
		};

		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = <0x5a001000 0x400>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LTDC_PX>;
			clock-names = "lcd";
			resets = <&scmi_reset RST_SCMI_LTDC>;
			status = "disabled";
		};
	};
};