summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
blob: 0248329da49a6393d2ec4a2e58b1498143419cbc (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's ExynosAuto v9 SoC device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 */

#include <dt-bindings/clock/samsung,exynosautov9.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,boot-mode.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>

/ {
	compatible = "samsung,exynosautov9";
	#address-cells = <2>;
	#size-cells = <1>;

	interrupt-parent = <&gic>;

	aliases {
		pinctrl0 = &pinctrl_alive;
		pinctrl1 = &pinctrl_aud;
		pinctrl2 = &pinctrl_fsys0;
		pinctrl3 = &pinctrl_fsys1;
		pinctrl4 = &pinctrl_fsys2;
		pinctrl5 = &pinctrl_peric0;
		pinctrl6 = &pinctrl_peric1;
	};

	arm-pmu {
		compatible = "arm,cortex-a76-pmu";
		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
				     <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {
					cpu = <&cpu3>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu4>;
				};
				core1 {
					cpu = <&cpu5>;
				};
				core2 {
					cpu = <&cpu6>;
				};
				core3 {
					cpu = <&cpu7>;
				};
			};
		};

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x0>;
			enable-method = "psci";
		};

		cpu1: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x100>;
			enable-method = "psci";
		};

		cpu2: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x200>;
			enable-method = "psci";
		};

		cpu3: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x300>;
			enable-method = "psci";
		};

		cpu4: cpu@10000 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10000>;
			enable-method = "psci";
		};

		cpu5: cpu@10100 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10100>;
			enable-method = "psci";
		};

		cpu6: cpu@10200 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10200>;
			enable-method = "psci";
		};

		cpu7: cpu@10300 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x10300>;
			enable-method = "psci";
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
		cpu_suspend = <0xc4000001>;
		cpu_off = <0x84000002>;
		cpu_on = <0xc4000003>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
	};

	fixed-rate-clocks {
		xtcxo: clock {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-output-names = "oscclk";
		};
	};

	soc: soc@0 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x0 0x20000000>;

		chipid@10000000 {
			compatible = "samsung,exynosautov9-chipid",
				     "samsung,exynos850-chipid";
			reg = <0x10000000 0x24>;
		};

		cmu_peris: clock-controller@10020000 {
			compatible = "samsung,exynosautov9-cmu-peris";
			reg = <0x10020000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIS_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_peris_bus";
		};

		cmu_peric0: clock-controller@10200000 {
			compatible = "samsung,exynosautov9-cmu-peric0";
			reg = <0x10200000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIC0_BUS>,
				 <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
			clock-names = "oscclk",
				      "dout_clkcmu_peric0_bus",
				      "dout_clkcmu_peric0_ip";
		};

		cmu_peric1: clock-controller@10800000 {
			compatible = "samsung,exynosautov9-cmu-peric1";
			reg = <0x10800000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_PERIC1_BUS>,
				 <&cmu_top DOUT_CLKCMU_PERIC1_IP>;
			clock-names = "oscclk",
				      "dout_clkcmu_peric1_bus",
				      "dout_clkcmu_peric1_ip";
		};

		cmu_fsys1: clock-controller@17040000 {
			compatible = "samsung,exynosautov9-cmu-fsys1";
			reg = <0x17040000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS1_BUS>,
				 <&cmu_top GOUT_CLKCMU_FSYS1_MMC_CARD>,
				 <&cmu_top DOUT_CLKCMU_FSYS1_USBDRD>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys1_bus",
				      "gout_clkcmu_fsys1_mmc_card",
				      "dout_clkcmu_fsys1_usbdrd";
		};

		cmu_fsys0: clock-controller@17700000 {
			compatible = "samsung,exynosautov9-cmu-fsys0";
			reg = <0x17700000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS0_BUS>,
				 <&cmu_top DOUT_CLKCMU_FSYS0_PCIE>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys0_bus",
				      "dout_clkcmu_fsys0_pcie";
		};

		cmu_fsys2: clock-controller@17c00000 {
			compatible = "samsung,exynosautov9-cmu-fsys2";
			reg = <0x17c00000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
				 <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
			clock-names = "oscclk",
				      "dout_clkcmu_fsys2_bus",
				      "dout_fsys2_clkcmu_ufs_embd",
				      "dout_fsys2_clkcmu_ethernet";
		};

		cmu_core: clock-controller@1b030000 {
			compatible = "samsung,exynosautov9-cmu-core";
			reg = <0x1b030000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_CORE_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_core_bus";
		};

		cmu_busmc: clock-controller@1b200000 {
			compatible = "samsung,exynosautov9-cmu-busmc";
			reg = <0x1b200000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>,
				 <&cmu_top DOUT_CLKCMU_BUSMC_BUS>;
			clock-names = "oscclk",
				      "dout_clkcmu_busmc_bus";
		};

		cmu_top: clock-controller@1b240000 {
			compatible = "samsung,exynosautov9-cmu-top";
			reg = <0x1b240000 0x8000>;
			#clock-cells = <1>;

			clocks = <&xtcxo>;
			clock-names = "oscclk";
		};

		gic: interrupt-controller@10101000 {
			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x10101000 0x1000>,
			      <0x10102000 0x2000>,
			      <0x10104000 0x2000>,
			      <0x10106000 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
						 IRQ_TYPE_LEVEL_HIGH)>;
		};

		pdma0: dma-controller@1b2e0000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x1b2e0000 0x1000>;
			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>;
			clock-names = "apb_pclk";
			arm,pl330-broken-no-flushp;
			#dma-cells = <1>;
		};

		pinctrl_alive: pinctrl@10450000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10450000 0x1000>;

			wakeup-interrupt-controller {
				compatible = "samsung,exynosautov9-wakeup-eint",
					     "samsung,exynos850-wakeup-eint",
					     "samsung,exynos7-wakeup-eint";
			};
		};

		pinctrl_aud: pinctrl@19c60000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x19c60000 0x1000>;
		};

		pinctrl_fsys0: pinctrl@17740000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17740000 0x1000>;
			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_fsys1: pinctrl@17060000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17060000 0x1000>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_fsys2: pinctrl@17c30000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x17c30000 0x1000>;
			interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_peric0: pinctrl@10230000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10230000 0x1000>;
			interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
		};

		pinctrl_peric1: pinctrl@10830000 {
			compatible = "samsung,exynosautov9-pinctrl";
			reg = <0x10830000 0x1000>;
			interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
		};

		pmu_system_controller: system-controller@10460000 {
			compatible = "samsung,exynosautov9-pmu",
				     "samsung,exynos7-pmu", "syscon";
			reg = <0x10460000 0x10000>;

			reboot: syscon-reboot {
				compatible = "syscon-reboot";
				regmap = <&pmu_system_controller>;
				offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
				value = <0x2>;
				mask = <0x2>;
			};

			reboot-mode {
				compatible = "syscon-reboot-mode";
				offset = <0x810>; /* SYSIP_DAT0 */
				mode-bootloader = <EXYNOSAUTOV9_BOOT_BOOTLOADER>;
				mode-fastboot = <EXYNOSAUTOV9_BOOT_FASTBOOT>;
				mode-recovery = <EXYNOSAUTOV9_BOOT_RECOVERY>;
			};
		};

		syscon_fsys2: syscon@17c20000 {
			compatible = "samsung,exynosautov9-fsys2-sysreg",
				     "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x17c20000 0x1000>;
		};

		syscon_peric0: syscon@10220000 {
			compatible = "samsung,exynosautov9-peric0-sysreg",
				     "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x10220000 0x2000>;
		};

		syscon_peric1: syscon@10820000 {
			compatible = "samsung,exynosautov9-peric1-sysreg",
				     "samsung,exynosautov9-sysreg", "syscon";
			reg = <0x10820000 0x2000>;
		};

		usi_0: usi@103000c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103000c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1000>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_0: serial@10300000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10300000 0xc0>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart0_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_0: spi@10300000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10300000 0x30>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_bus &spi0_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 1>, <&pdma0 0>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <256>;
				status = "disabled";
			};

			hsi2c_0: i2c@10300000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10300000 0xc0>;
				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c0_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_0: usi@103100c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103100c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1004>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_1: i2c@10310000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10310000 0xc0>;
				interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c1_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_1: usi@103200c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103200c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1008>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_1: serial@10320000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10320000 0xc0>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart1_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_1: spi@10320000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10320000 0x30>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi1_bus &spi1_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 3>, <&pdma0 2>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <256>;
				status = "disabled";
			};

			hsi2c_2: i2c@10320000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10320000 0xc0>;
				interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c2_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_1: usi@103300c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103300c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x100c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_3: i2c@10330000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10330000 0xc0>;
				interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c3_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_2: usi@103400c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103400c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1010>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_2: serial@10340000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10340000 0xc0>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart2_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_2: spi@10340000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10340000 0x30>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi2_bus &spi2_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 5>, <&pdma0 4>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_4: i2c@10340000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10340000 0xc0>;
				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c4_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_2: usi@103500c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103500c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1014>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_5: i2c@10350000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10350000 0xc0>;
				interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c5_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_3: usi@103600c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103600c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1018>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_3: serial@10360000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10360000 0xc0>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart3_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_3: spi@10360000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10360000 0x30>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi3_bus &spi3_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 7>, <&pdma0 6>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_6: i2c@10360000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10360000 0xc0>;
				interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c6_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_3: usi@103700c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103700c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x101c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_7: i2c@10370000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10370000 0xc0>;
				interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c7_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_4: usi@103800c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103800c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1020>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_4: serial@10380000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10380000 0xc0>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart4_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_4: spi@10380000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10380000 0x30>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi4_bus &spi4_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 9>, <&pdma0 8>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_8: i2c@10380000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10380000 0xc0>;
				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c8_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_4: usi@103900c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103900c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1024>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_9: i2c@10390000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10390000 0xc0>;
				interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c9_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_5: usi@103a00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103a00c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x1028>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_5: serial@103a0000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x103a0000 0xc0>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart5_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_5: spi@103a0000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x103a0000 0x30>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi5_bus &spi5_cs_func>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
					 <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 11>, <&pdma0 10>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_10: i2c@103a0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x103a0000 0xc0>;
				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c10_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_5: usi@103b00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x103b00c0 0x20>;
			samsung,sysreg = <&syscon_peric0 0x102c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>,
				 <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_11: i2c@103b0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x103b0000 0xc0>;
				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c11_bus>;
				clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>,
					 <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_6: usi@109000c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109000c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1000>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_6: serial@10900000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10900000 0xc0>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart6_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <256>;
				status = "disabled";
			};

			spi_6: spi@10900000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10900000 0x30>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi6_bus &spi6_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 13>, <&pdma0 12>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <256>;
				status = "disabled";
			};

			hsi2c_12: i2c@10900000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10900000 0xc0>;
				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c12_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_6: usi@109100c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109100c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1004>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_13: i2c@10910000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10910000 0xc0>;
				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c13_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_7: usi@109200c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109200c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1008>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_7: serial@10920000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10920000 0xc0>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart7_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_7: spi@10920000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10920000 0x30>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi7_bus &spi7_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 15>, <&pdma0 14>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_14: i2c@10920000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10920000 0xc0>;
				interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c14_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_7: usi@109300c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109300c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x100c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_15: i2c@10930000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10930000 0xc0>;
				interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c15_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_8: usi@109400c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109400c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1010>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_8: serial@10940000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10940000 0xc0>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart8_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_8: spi@10940000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10940000 0x30>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi8_bus &spi8_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 17>, <&pdma0 16>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_16: i2c@10940000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10940000 0xc0>;
				interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c16_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_8: usi@109500c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109500c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1014>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_17: i2c@10950000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10950000 0xc0>;
				interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c17_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_9: usi@109600c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109600c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1018>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_9: serial@10960000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10960000 0xc0>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart9_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_9: spi@10960000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10960000 0x30>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi9_bus &spi9_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 19>, <&pdma0 18>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_18: i2c@10960000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10960000 0xc0>;
				interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c18_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_9: usi@109700c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109700c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x101c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_19: i2c@10970000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10970000 0xc0>;
				interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c19_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_10: usi@109800c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109800c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1020>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_10: serial@10980000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x10980000 0xc0>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart10_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_10: spi@10980000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x10980000 0x30>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi10_bus &spi10_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				dmas = <&pdma0 21>, <&pdma0 20>;
				dma-names = "tx", "rx";
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_20: i2c@10980000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10980000 0xc0>;
				interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c20_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_10: usi@109900c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109900c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1024>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_21: i2c@10990000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x10990000 0xc0>;
				interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c21_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_11: usi@109a00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109a00c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x1028>;
			samsung,mode = <USI_V2_UART>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			serial_11: serial@109a0000 {
				compatible = "samsung,exynosautov9-uart",
					     "samsung,exynos850-uart";
				reg = <0x109a0000 0xc0>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&uart11_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
				clock-names = "uart", "clk_uart_baud0";
				samsung,uart-fifosize = <64>;
				status = "disabled";
			};

			spi_11: spi@109a0000 {
				compatible = "samsung,exynosautov9-spi";
				reg = <0x109a0000 0x30>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&spi11_bus &spi11_cs_func>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
					 <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
				clock-names = "spi", "spi_busclk0", "spi_ioclk";
				samsung,spi-src-clk = <0>;
				num-cs = <1>;
				#address-cells = <1>;
				#size-cells = <0>;
				fifo-depth = <64>;
				status = "disabled";
			};

			hsi2c_22: i2c@109a0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x109a0000 0xc0>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c22_bus>;
				interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		usi_i2c_11: usi@109b00c0 {
			compatible = "samsung,exynosautov9-usi",
				     "samsung,exynos850-usi";
			reg = <0x109b00c0 0x20>;
			samsung,sysreg = <&syscon_peric1 0x102c>;
			samsung,mode = <USI_V2_I2C>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>,
				 <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>;
			clock-names = "pclk", "ipclk";
			status = "disabled";

			hsi2c_23: i2c@109b0000 {
				compatible = "samsung,exynosautov9-hsi2c";
				reg = <0x109b0000 0xc0>;
				interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
				pinctrl-names = "default";
				pinctrl-0 = <&hsi2c23_bus>;
				clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>,
					 <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>;
				clock-names = "hsi2c", "hsi2c_pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		ufs_0_phy: phy@17e04000 {
			compatible = "samsung,exynosautov9-ufs-phy";
			reg = <0x17e04000 0xc00>;
			reg-names = "phy-pma";
			samsung,pmu-syscon = <&pmu_system_controller>;
			#phy-cells = <0>;
			clocks = <&xtcxo>;
			clock-names = "ref_clk";
			status = "disabled";
		};

		ufs_0: ufs@17e00000 {
			compatible = "samsung,exynosautov9-ufs";

			reg = <0x17e00000 0x100>,
			      <0x17e01100 0x410>,
			      <0x17e80000 0x8000>,
			      <0x17dc0000 0x2200>;
			reg-names = "hci", "vs_hci", "unipro", "ufsp";
			interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_UNIPRO>;
			clock-names = "core_clk", "sclk_unipro_main";
			freq-table-hz = <0 0>, <0 0>;
			pinctrl-names = "default";
			pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
			phys = <&ufs_0_phy>;
			phy-names = "ufs-phy";
			samsung,sysreg = <&syscon_fsys2 0x710>;
			status = "disabled";
		};

		ufs_1_phy: phy@17f04000 {
			compatible = "samsung,exynosautov9-ufs-phy";
			reg = <0x17f04000 0xc00>;
			reg-names = "phy-pma";
			samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
			#phy-cells = <0>;
			clocks = <&xtcxo>;
			clock-names = "ref_clk";
			status = "disabled";
		};

		ufs_1: ufs@17f00000 {
			compatible = "samsung,exynosautov9-ufs";

			reg = <0x17f00000 0x100>,
			      <0x17f01100 0x410>,
			      <0x17f80000 0x8000>,
			      <0x17de0000 0x2200>;
			reg-names = "hci", "vs_hci", "unipro", "ufsp";
			interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
				 <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
			clock-names = "core_clk", "sclk_unipro_main";
			freq-table-hz = <0 0>, <0 0>;
			pinctrl-names = "default";
			pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
			phys = <&ufs_1_phy>;
			phy-names = "ufs-phy";
			samsung,sysreg = <&syscon_fsys2 0x714>;
			status = "disabled";
		};

		watchdog_cl0: watchdog@10050000 {
			compatible = "samsung,exynosautov9-wdt";
			reg = <0x10050000 0x100>;
			interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>;
			clock-names = "watchdog", "watchdog_src";
			samsung,syscon-phandle = <&pmu_system_controller>;
			samsung,cluster-index = <0>;
		};

		watchdog_cl1: watchdog@10060000 {
			compatible = "samsung,exynosautov9-wdt";
			reg = <0x10060000 0x100>;
			interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER1>, <&xtcxo>;
			clock-names = "watchdog", "watchdog_src";
			samsung,syscon-phandle = <&pmu_system_controller>;
			samsung,cluster-index = <1>;
		};

		pwm: pwm@103f0000 {
			compatible = "samsung,exynosautov9-pwm",
				     "samsung,exynos4210-pwm";
			reg = <0x103f0000 0x100>;
			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
			#pwm-cells = <3>;
			clocks = <&xtcxo>;
			clock-names = "timers";
			status = "disabled";
		};
	};
};

#include "exynosautov9-pinctrl.dtsi"