blob: 1780ed237daf2e60e92249b0db4d52c6157efd45 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
|
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 RevB
*
* (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
#include "zynqmp-zcu102-revA.dts"
/ {
model = "ZynqMP ZCU102 RevB";
compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
};
&gem3 {
phy-handle = <&phyc>;
phyc: phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
};
/* Cleanup from RevA */
/delete-node/ phy@21;
};
/* Fix collision with u61 */
&i2c0 {
i2c-mux@75 {
i2c@2 {
max15303@1b { /* u8 */
compatible = "maxim,max15303";
reg = <0x1b>;
};
/delete-node/ max15303@20;
};
};
};
|