summaryrefslogtreecommitdiffstats
path: root/arch/frv/kernel/entry-table.S
blob: 9b9243e2103cd00b5f164a76ad6b270834ec8c4c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
/* entry-table.S: main trap vector tables and exception jump table
 *
 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 */

#include <linux/sys.h>
#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/spr-regs.h>

###############################################################################
#
# Declare the main trap and vector tables
#
# There are six tables:
#
# (1) The trap table for debug mode
# (2) The trap table for kernel mode
# (3) The trap table for user mode
#
#     The CPU jumps to an appropriate slot in the appropriate table to perform
#     exception processing. We have three different tables for the three
#     different CPU modes because there is no hardware differentiation between
#     stack pointers for these three modes, and so we have to invent one when
#     crossing mode boundaries.
#
# (4) The exception handler vector table
#
#     The user and kernel trap tables use the same prologue for normal
#     exception processing. The prologue then jumps to the handler in this
#     table, as indexed by the exception ID from the TBR.
#
# (5) The fixup table for kernel-trap single-step
# (6) The fixup table for user-trap single-step
#
#     Due to the way single-stepping works on this CPU (single-step is not
#     disabled when crossing exception boundaries, only when in debug mode),
#     we have to catch the single-step event in break.S and jump to the fixup
#     routine pointed to by this table.
#
# The linker script places the user mode and kernel mode trap tables on to
# the same 8Kb page, so that break.S can be more efficient when performing
# single-step bypass management
#
###############################################################################

	# trap table for entry from debug mode
	.section	.trap.break,"ax"
	.balign		256*16
	.globl		__entry_breaktrap_table
__entry_breaktrap_table:

	# trap table for entry from user mode
	.section	.trap.user,"ax"
	.balign		256*16
	.globl		__entry_usertrap_table
__entry_usertrap_table:

	# trap table for entry from kernel mode
	.section	.trap.kernel,"ax"
	.balign		256*16
	.globl		__entry_kerneltrap_table
__entry_kerneltrap_table:

	# exception handler jump table
	.section	.trap.vector,"ax"
	.balign		256*4
	.globl		__entry_vector_table
__entry_vector_table:

	# trap fixup table for single-stepping in user mode
	.section	.trap.fixup.user,"a"
	.balign		256*4
	.globl		__break_usertrap_fixup_table
__break_usertrap_fixup_table:

	# trap fixup table for single-stepping in user mode
	.section	.trap.fixup.kernel,"a"
	.balign		256*4
	.globl		__break_kerneltrap_fixup_table
__break_kerneltrap_fixup_table:

	# handler declaration for a sofware or program interrupt
.macro VECTOR_SOFTPROG tbr_tt, vec
	.section .trap.user
	.org		\tbr_tt
	bra		__entry_uspace_softprog_interrupt
	.section .trap.fixup.user
	.org		\tbr_tt >> 2
	.long		__break_step_uspace_softprog_interrupt
	.section .trap.kernel
	.org		\tbr_tt
	bra		__entry_kernel_softprog_interrupt
	.section .trap.fixup.kernel
	.org		\tbr_tt >> 2
	.long		__break_step_kernel_softprog_interrupt
	.section .trap.vector
	.org		\tbr_tt >> 2
	.long		\vec
.endm

	# handler declaration for a maskable external interrupt
.macro VECTOR_IRQ tbr_tt, vec
	.section .trap.user
	.org		\tbr_tt
	bra		__entry_uspace_external_interrupt
	.section .trap.fixup.user
	.org		\tbr_tt >> 2
	.long		__break_step_uspace_external_interrupt
	.section .trap.kernel
	.org		\tbr_tt
	bra		__entry_kernel_external_interrupt
	.section .trap.fixup.kernel
	.org		\tbr_tt >> 2
	.long		__break_step_kernel_external_interrupt
	.section .trap.vector
	.org		\tbr_tt >> 2
	.long		\vec
.endm

	# handler declaration for an NMI external interrupt
.macro VECTOR_NMI tbr_tt, vec
	.section .trap.user
	.org		\tbr_tt
	break
	break
	break
	break
	.section .trap.kernel
	.org		\tbr_tt
	break
	break
	break
	break
	.section .trap.vector
	.org		\tbr_tt >> 2
	.long		\vec
.endm

	# handler declaration for an MMU only sofware or program interrupt
.macro VECTOR_SP_MMU tbr_tt, vec
#ifdef CONFIG_MMU
 	VECTOR_SOFTPROG	\tbr_tt, \vec
#else
	VECTOR_NMI	\tbr_tt, 0
#endif
.endm


###############################################################################
#
# specification of the vectors
# - note: each macro inserts code into multiple sections
#
###############################################################################
	VECTOR_SP_MMU	TBR_TT_INSTR_MMU_MISS,	__entry_insn_mmu_miss
	VECTOR_SOFTPROG	TBR_TT_INSTR_ACC_ERROR,	__entry_insn_access_error
	VECTOR_SOFTPROG	TBR_TT_INSTR_ACC_EXCEP,	__entry_insn_access_exception
	VECTOR_SOFTPROG	TBR_TT_PRIV_INSTR,	__entry_privileged_instruction
	VECTOR_SOFTPROG	TBR_TT_ILLEGAL_INSTR,	__entry_illegal_instruction
	VECTOR_SOFTPROG	TBR_TT_FP_EXCEPTION,	__entry_media_exception
	VECTOR_SOFTPROG	TBR_TT_MP_EXCEPTION,	__entry_media_exception
	VECTOR_SOFTPROG	TBR_TT_DATA_ACC_ERROR,	__entry_data_access_error
	VECTOR_SP_MMU	TBR_TT_DATA_MMU_MISS,	__entry_data_mmu_miss
	VECTOR_SOFTPROG	TBR_TT_DATA_ACC_EXCEP,	__entry_data_access_exception
	VECTOR_SOFTPROG	TBR_TT_DATA_STR_ERROR,	__entry_data_store_error
	VECTOR_SOFTPROG	TBR_TT_DIVISION_EXCEP,	__entry_division_exception

#ifdef CONFIG_MMU
	.section .trap.user
	.org		TBR_TT_INSTR_TLB_MISS
	.globl		__trap_user_insn_tlb_miss
__trap_user_insn_tlb_miss:
	movsg		ear0,gr28			/* faulting address */
	movsg		scr0,gr31			/* get mapped PTD coverage start address */
	xor.p		gr28,gr31,gr31			/* compare addresses */
	bra		__entry_user_insn_tlb_miss

	.org		TBR_TT_DATA_TLB_MISS
	.globl		__trap_user_data_tlb_miss
__trap_user_data_tlb_miss:
	movsg		ear0,gr28			/* faulting address */
	movsg		scr1,gr31			/* get mapped PTD coverage start address */
	xor.p		gr28,gr31,gr31			/* compare addresses */
	bra		__entry_user_data_tlb_miss

	.section .trap.kernel
	.org		TBR_TT_INSTR_TLB_MISS
	.globl		__trap_kernel_insn_tlb_miss
__trap_kernel_insn_tlb_miss:
	movsg		ear0,gr29			/* faulting address */
	movsg		scr0,gr31			/* get mapped PTD coverage start address */
	xor.p		gr29,gr31,gr31			/* compare addresses */
	bra		__entry_kernel_insn_tlb_miss

	.org		TBR_TT_DATA_TLB_MISS
	.globl		__trap_kernel_data_tlb_miss
__trap_kernel_data_tlb_miss:
	movsg		ear0,gr29			/* faulting address */
	movsg		scr1,gr31			/* get mapped PTD coverage start address */
	xor.p		gr29,gr31,gr31			/* compare addresses */
	bra		__entry_kernel_data_tlb_miss

	.section .trap.fixup.user
	.org		TBR_TT_INSTR_TLB_MISS >> 2
	.globl		__trap_fixup_user_insn_tlb_miss
__trap_fixup_user_insn_tlb_miss:
	.long		__break_user_insn_tlb_miss
	.org		TBR_TT_DATA_TLB_MISS >> 2
	.globl		__trap_fixup_user_data_tlb_miss
__trap_fixup_user_data_tlb_miss:
	.long		__break_user_data_tlb_miss

	.section .trap.fixup.kernel
	.org		TBR_TT_INSTR_TLB_MISS >> 2
	.globl		__trap_fixup_kernel_insn_tlb_miss
__trap_fixup_kernel_insn_tlb_miss:
	.long		__break_kernel_insn_tlb_miss
	.org		TBR_TT_DATA_TLB_MISS >> 2
	.globl		__trap_fixup_kernel_data_tlb_miss
__trap_fixup_kernel_data_tlb_miss:
	.long		__break_kernel_data_tlb_miss

	.section .trap.vector
	.org		TBR_TT_INSTR_TLB_MISS >> 2
	.long		__entry_insn_mmu_fault
	.org		TBR_TT_DATA_TLB_MISS >> 2
	.long		__entry_data_mmu_fault
#endif

	VECTOR_SP_MMU	TBR_TT_DATA_DAT_EXCEP,	__entry_data_dat_fault
	VECTOR_NMI	TBR_TT_DECREMENT_TIMER,	__entry_do_NMI
	VECTOR_SOFTPROG	TBR_TT_COMPOUND_EXCEP,	__entry_compound_exception
	VECTOR_IRQ	TBR_TT_INTERRUPT_1,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_2,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_3,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_4,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_5,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_6,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_7,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_8,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_9,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_10,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_11,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_12,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_13,	__entry_do_IRQ
	VECTOR_IRQ	TBR_TT_INTERRUPT_14,	__entry_do_IRQ
	VECTOR_NMI	TBR_TT_INTERRUPT_15,	__entry_do_NMI

	# miscellaneous user mode entry points
	.section	.trap.user
	.org		TBR_TT_TRAP0
	.rept		127
	bra		__entry_uspace_softprog_interrupt
	bra		__break_step_uspace_softprog_interrupt
	.long		0,0
	.endr
	.org		TBR_TT_BREAK
	bra		__entry_break
	.long		0,0,0

	# miscellaneous kernel mode entry points
	.section	.trap.kernel
	.org		TBR_TT_TRAP0
	.rept		127
	bra		__entry_kernel_softprog_interrupt
	bra		__break_step_kernel_softprog_interrupt
	.long		0,0
	.endr
	.org		TBR_TT_BREAK
	bra		__entry_break
	.long		0,0,0

	# miscellaneous debug mode entry points
	.section	.trap.break
	.org		TBR_TT_BREAK
	movsg		bpcsr,gr30
	jmpl		@(gr30,gr0)

	# miscellaneous vectors
	.section	.trap.vector
	.org		TBR_TT_TRAP0 >> 2
	.long		system_call
	.rept		126
	.long		__entry_unsupported_trap
	.endr
	.org		TBR_TT_BREAK >> 2
	.long		__entry_debug_exception