summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/p1023rdb.dts
blob: 9236e3742a2376f6c4ac43095bc0a3446cde84b4 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
/*
 * P1023 RDB Device Tree Source
 *
 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
 *
 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/include/ "fsl/p1023si-pre.dtsi"

/ {
	model = "fsl,P1023";
	compatible = "fsl,P1023RDB";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&mpic>;

	memory {
		device_type = "memory";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		bman_fbpr: bman-fbpr {
			size = <0 0x1000000>;
			alignment = <0 0x1000000>;
		};
	};

	bportals: bman-portals@ff200000 {
		ranges = <0x0 0xf 0xff200000 0x200000>;
	};

	soc: soc@ff600000 {
		ranges = <0x0 0x0 0xff600000 0x200000>;

		i2c@3000 {
			eeprom@53 {
				compatible = "at24,24c04";
				reg = <0x53>;
			};

			rtc@6f {
				compatible = "microchip,mcp7941x";
				reg = <0x6f>;
			};
		};

		usb@22000 {
			dr_mode = "host";
			phy_type = "ulpi";
		};
	};

	lbc: localbus@ff605000 {
		reg = <0 0xff605000 0 0x1000>;

		/* NOR, NAND Flashes */
		ranges = <0x0 0x0 0x0 0xec000000 0x04000000
			  0x1 0x0 0x0 0xffa00000 0x08000000>;

		nor@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x0 0x04000000>;
			bank-width = <2>;
			device-width = <1>;

			partition@0 {
				/* 48MB for Root File System */
				reg = <0x00000000 0x03000000>;
				label = "NOR Root File System";
			};

			partition@3000000 {
				/* 1MB for DTB Image */
				reg = <0x03000000 0x00100000>;
				label = "NOR DTB Image";
			};

			partition@3100000 {
				/* 14MB for Linux Kernel Image */
				reg = <0x03100000 0x00e00000>;
				label = "NOR Linux Kernel Image";
			};

			partition@3f00000 {
				/* This location must not be altered  */
				/* 512KB for u-boot Bootloader Image */
				/* 512KB for u-boot Environment Variables */
				reg = <0x03f00000 0x00100000>;
				label = "NOR U-Boot Image";
				read-only;
			};
		};

		nand@1,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,elbc-fcm-nand";
			reg = <0x1 0x0 0x40000>;

			partition@0 {
				/* This location must not be altered  */
				/* 1MB for u-boot Bootloader Image */
				reg = <0x0 0x00100000>;
				label = "NAND U-Boot Image";
				read-only;
			};

			partition@100000 {
				/* 1MB for DTB Image */
				reg = <0x00100000 0x00100000>;
				label = "NAND DTB Image";
			};

			partition@200000 {
				/* 14MB for Linux Kernel Image */
				reg = <0x00200000 0x00e00000>;
				label = "NAND Linux Kernel Image";
			};

			partition@1000000 {
				/* 96MB for Root File System Image */
				reg = <0x01000000 0x06000000>;
				label = "NAND Root File System";
			};

			partition@7000000 {
				/* 16MB for User Writable Area */
				reg = <0x07000000 0x01000000>;
				label = "NAND Writable User area";
			};
		};
	};

	pci0: pcie@ff60a000 {
		reg = <0 0xff60a000 0 0x1000>;
		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
		pcie@0 {
			/* IRQ[0:3] are pulled up on board, set to active-low */
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map = <
				/* IDSEL 0x0 */
				0000 0 0 1 &mpic 0 1 0 0
				0000 0 0 2 &mpic 1 1 0 0
				0000 0 0 3 &mpic 2 1 0 0
				0000 0 0 4 &mpic 3 1 0 0
				>;
			ranges = <0x2000000 0x0 0xc0000000
				  0x2000000 0x0 0xc0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};

	board_pci1: pci1: pcie@ff609000 {
		reg = <0 0xff609000 0 0x1000>;
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
		pcie@0 {
			/*
			 * IRQ[4:6] only for PCIe, set to active-high,
			 * IRQ[7] is pulled up on board, set to active-low
			 */
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map = <
				/* IDSEL 0x0 */
				0000 0 0 1 &mpic 4 2 0 0
				0000 0 0 2 &mpic 5 2 0 0
				0000 0 0 3 &mpic 6 2 0 0
				0000 0 0 4 &mpic 7 1 0 0
				>;
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};

	pci2: pcie@ff60b000 {
		reg = <0 0xff60b000 0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
		pcie@0 {
			/*
			 * IRQ[8:10] are pulled up on board, set to active-low
			 * IRQ[11] only for PCIe, set to active-high,
			 */
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map = <
				/* IDSEL 0x0 */
				0000 0 0 1 &mpic 8 1 0 0
				0000 0 0 2 &mpic 9 1 0 0
				0000 0 0 3 &mpic 10 1 0 0
				0000 0 0 4 &mpic 11 2 0 0
				>;
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};
};

/include/ "fsl/p1023si-post.dtsi"