drivers/clk/kunit_clk_parent_data_test.dtso


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// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/plugin/;

#include "clk_parent_data_test.h"

&{/} {
	fixed_50: kunit-clock-50MHz {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
		clock-output-names = CLK_PARENT_DATA_50MHZ_NAME;
	};

	fixed_parent: kunit-clock-1MHz {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <1000000>;
		clock-output-names = CLK_PARENT_DATA_1MHZ_NAME;
	};

	kunit-clock-controller {
		compatible = "test,clk-parent-data";
		clocks = <&fixed_parent>, <&fixed_50>;
		clock-names = CLK_PARENT_DATA_PARENT1, CLK_PARENT_DATA_PARENT2;
		#clock-cells = <1>;
	};
};