blob: 0862c2bfd9cd363812c57a0d055cdeb40a58a8bb (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2024 Intel Corporation
*/
#ifndef __INTEL_TDF_H__
#define __INTEL_TDF_H__
/*
* TDF (Transient-Data-Flush) is needed for Xe2+ where special L3:XD caching can
* be enabled through various PAT index modes. Idea is to use this caching mode
* when for example rendering onto the display surface, with the promise that
* KMD will ensure transient cache entries are always flushed by the time we do
* the display flip, since display engine is never coherent with CPU/GPU caches.
*/
struct intel_display;
#ifdef I915
static inline void intel_td_flush(struct intel_display *display) {}
#else
void intel_td_flush(struct intel_display *display);
#endif
#endif
|
