generic: 6.6: backport Marvell Amethyst SMI GPIO setup

Marvell Amethyst switches use a different SMI GPIO pin setup than other
switches, and since RB5009 uses Amethyst switch and its SMI bus to talk
to QCA8081 lets backport the required fix from kernel 6.9.

Link: https://github.com/openwrt/openwrt/pull/15765
Signed-off-by: Robert Marko <robimarko@gmail.com>

3 files changed, 154 insertions, 1 deletions

diff --git a/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch
new file mode 100644
index 0000000000..d9265cad10
--- /dev/null
+++ b/target/linux/generic/backport-6.6/896-01-v6.9-net-dsa-mv88e6xxx-rename-mv88e6xxx_g2_scratch_gpio_s.patch
@@ -0,0 +1,61 @@
+From 5c5b0c444be3e851046f1c1074459b8d15d2a0f9 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Tue, 27 Feb 2024 18:54:21 +0100
+Subject: [PATCH 1/2] net: dsa: mv88e6xxx: rename
+ mv88e6xxx_g2_scratch_gpio_set_smi
+
+The name mv88e6xxx_g2_scratch_gpio_set_smi is a bit ambiguous as it appears
+to only be applicable to the 6390 family, so lets rename it to
+mv88e6390_g2_scratch_gpio_set_smi to make it more obvious.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/dsa/mv88e6xxx/chip.c            | 2 +-
+ drivers/net/dsa/mv88e6xxx/global2.h         | 2 +-
+ drivers/net/dsa/mv88e6xxx/global2_scratch.c | 4 ++--
+ 3 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/dsa/mv88e6xxx/chip.c
++++ b/drivers/net/dsa/mv88e6xxx/chip.c
+@@ -3668,7 +3668,7 @@ static int mv88e6xxx_mdio_register(struc
+ 
+ 	if (external) {
+ 		mv88e6xxx_reg_lock(chip);
+-		err = mv88e6xxx_g2_scratch_gpio_set_smi(chip, true);
++		err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
+ 		mv88e6xxx_reg_unlock(chip);
+ 
+ 		if (err)
+--- a/drivers/net/dsa/mv88e6xxx/global2.h
++++ b/drivers/net/dsa/mv88e6xxx/global2.h
+@@ -378,7 +378,7 @@ extern const struct mv88e6xxx_avb_ops mv
+ 
+ extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops;
+ 
+-int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
++int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+ 				      bool external);
+ int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
+ int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
+--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c
++++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
+@@ -240,7 +240,7 @@ const struct mv88e6xxx_gpio_ops mv88e635
+ };
+ 
+ /**
+- * mv88e6xxx_g2_scratch_gpio_set_smi - set gpio muxing for external smi
++ * mv88e6390_g2_scratch_gpio_set_smi - set gpio muxing for external smi
+  * @chip: chip private data
+  * @external: set mux for external smi, or free for gpio usage
+  *
+@@ -248,7 +248,7 @@ const struct mv88e6xxx_gpio_ops mv88e635
+  * an external SMI interface, or they may be made free for other
+  * GPIO uses.
+  */
+-int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
++int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+ 				      bool external)
+ {
+ 	int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
diff --git a/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
new file mode 100644
index 0000000000..5661d50adb
--- /dev/null
+++ b/target/linux/generic/backport-6.6/896-02-v6.9-net-dsa-mv88e6xxx-add-Amethyst-specific-SMI-GPIO-fun.patch
@@ -0,0 +1,92 @@
+From e3ab3267a0bbedc37725bb845a332ec33b247263 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Tue, 27 Feb 2024 18:54:22 +0100
+Subject: [PATCH 2/2] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO
+ function
+
+The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the
+88E6393X as it requires certain P0_MODE, it also checks the CPU mode
+as it impacts the bit setting value.
+
+This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only
+the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap
+pin value but it can be changed without restrictions so that GPIO pins
+9 and 10 are used as SMI pins.
+
+So, introduce Amethyst specific function and call that if the Amethyst
+family wants to setup the external PHY.
+
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/dsa/mv88e6xxx/chip.c            |  5 +++-
+ drivers/net/dsa/mv88e6xxx/global2.h         |  2 ++
+ drivers/net/dsa/mv88e6xxx/global2_scratch.c | 31 +++++++++++++++++++++
+ 3 files changed, 37 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/dsa/mv88e6xxx/chip.c
++++ b/drivers/net/dsa/mv88e6xxx/chip.c
+@@ -3668,7 +3668,10 @@ static int mv88e6xxx_mdio_register(struc
+ 
+ 	if (external) {
+ 		mv88e6xxx_reg_lock(chip);
+-		err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
++		if (chip->info->family == MV88E6XXX_FAMILY_6393)
++			err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);
++		else
++			err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
+ 		mv88e6xxx_reg_unlock(chip);
+ 
+ 		if (err)
+--- a/drivers/net/dsa/mv88e6xxx/global2.h
++++ b/drivers/net/dsa/mv88e6xxx/global2.h
+@@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops m
+ 
+ int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+ 				      bool external);
++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
++				       bool external);
+ int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
+ int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
+ int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);
+--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c
++++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
+@@ -291,6 +291,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(st
+ }
+ 
+ /**
++ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
++ * @chip: chip private data
++ * @external: set mux for external smi, or free for gpio usage
++ *
++ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an
++ * external SMI interface or as regular GPIO-s.
++ *
++ * They however have a different register layout then the existing
++ * function.
++ */
++
++int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
++				       bool external)
++{
++	int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
++	int err;
++	u8 val;
++
++	err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val);
++	if (err)
++		return err;
++
++	if (external)
++		val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
++	else
++		val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
++
++	return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
++}
++
++/**
+  * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
+  * @chip: chip private data
+  * @port: port number to check for serdes
diff --git a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
index 56a015b71e..15d385c5fd 100644
--- a/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+++ b/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
@@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -6989,6 +6989,7 @@ static int mv88e6xxx_register_switch(str
+@@ -6992,6 +6992,7 @@ static int mv88e6xxx_register_switch(str
  	ds->ops = &mv88e6xxx_switch_ops;
  	ds->ageing_time_min = chip->info->age_time_coeff;
  	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;